Documentation/devicetree/bindings/pci/pci-keystone.txt

   1 TI Keystone PCIe interface
   2
   3 Keystone PCI host Controller is based on the Synopsys DesignWare PCI
   4 hardware version 3.65.  It shares common functions with the PCIe DesignWare
   5 core driver and inherits common properties defined in
   6 Documentation/devicetree/bindings/pci/designware-pcie.txt
   7
   8 Please refer to Documentation/devicetree/bindings/pci/designware-pcie.txt
   9 for the details of DesignWare DT bindings.  Additional properties are
  10 described here as well as properties that are not applicable.
  11
  12 Required Properties:-
  13
  14 compatibility: "ti,keystone-pcie"
  15 reg:    index 1 is the base address and length of DW application registers.
  16         index 2 is the base address and length of PCI device ID register.
  17
  18 pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
  19         interrupt-cells: should be set to 1
  20         interrupts: GIC interrupt lines connected to PCI MSI interrupt lines
  21
  22  Example:
  23         pcie_msi_intc: msi-interrupt-controller {
  24                         interrupt-controller;
  25                         #interrupt-cells = <1>;
  26                         interrupt-parent = <&gic>;
  27                         interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
  28                                         <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
  29                                         <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
  30                                         <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
  31                                         <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
  32                                         <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
  33                                         <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
  34                                         <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
  35         };
  36
  37 pcie_intc: Interrupt controller device node for Legacy IRQ chip
  38         interrupt-cells: should be set to 1
  39
  40  Example:
  41         pcie_intc: legacy-interrupt-controller {
  42                 interrupt-controller;
  43                 #interrupt-cells = <1>;
  44                 interrupt-parent = <&gic>;
  45                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
  46                         <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
  47                         <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
  48                         <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
  49         };
  50
  51 Optional properties:-
  52         phys: phandle to generic Keystone SerDes PHY for PCI
  53         phy-names: name of the generic Keystone SerDes PHY for PCI
  54           - If boot loader already does PCI link establishment, then phys and
  55             phy-names shouldn't be present.
  56         interrupts: platform interrupt for error interrupts.
  57
  58 DesignWare DT Properties not applicable for Keystone PCI
  59
  60 1. pcie_bus clock-names not used.  Instead, a phandle to phys is used.