1 * Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
3 The Enhanced Secure Digital Host Controller on Freescale i.MX family
4 provides an interface for MMC, SD, and SDIO types of memory cards.
6 This file documents differences between the core properties described
7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
10 - compatible : Should be "fsl,<chip>-esdhc", the supported chips include
28 - fsl,wp-controller : Indicate to use controller internal write protection
29 - fsl,delay-line : Specify the number of delay cells for override mode.
30 This is used to set the clock delay for DLL(Delay Line) on override mode
31 to select a proper data sampling window in case the clock quality is not good
32 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
33 chapter, DLL (Delay Line) section in RM for details.
34 - voltage-ranges : Specify the voltage range in case there are software
35 transparent level shifters on the outputs of the controller. Two cells are
36 required, first cell specifies minimum slot voltage (mV), second cell
37 specifies maximum slot voltage (mV). Several ranges could be specified.
38 - fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19
40 - fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure.
41 The uSDHC use one delay cell as default increasing step to do tuning process.
42 This property allows user to change the tuning step to more than one delay
43 cells which is useful for some special boards or cards when the default
44 tuning step can't find the proper delay window within limited tuning retries.
49 compatible = "fsl,imx51-esdhc";
50 reg = <0x70004000 0x4000>;
56 compatible = "fsl,imx51-esdhc";
57 reg = <0x70008000 0x4000>;
59 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
60 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */