epan/dissectors/packet-ubertooth.c

   1 /* packet-ubertooth.c
   2  * Routines for Ubertooth USB dissection
   3  *
   4  * Copyright 2013, Michal Labedzki for Tieto Corporation
   5  *
   6  * Wireshark - Network traffic analyzer
   7  * By Gerald Combs <gerald@wireshark.org>
   8  * Copyright 1998 Gerald Combs
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  23  */
  24
  25 #include "config.h"
  26
  27 #include <epan/packet.h>
  28 #include <epan/prefs.h>
  29 #include <epan/expert.h>
  30 #include <epan/wmem/wmem.h>
  31 #include <epan/addr_resolv.h>
  32
  33 #include "packet-bluetooth-hci.h"
  34 #include "packet-usb.h"
  35
  36 static int proto_ubertooth = -1;
  37
  38 static int hf_command = -1;
  39 static int hf_response = -1;
  40 static int hf_argument_0 = -1;
  41 static int hf_argument_1 = -1;
  42 static int hf_estimated_length = -1;
  43 static int hf_board_id = -1;
  44 static int hf_reserved = -1;
  45 static int hf_length = -1;
  46 static int hf_firmware_revision = -1;
  47 static int hf_firmware_compile_info = -1;
  48 static int hf_user_led = -1;
  49 static int hf_rx_led = -1;
  50 static int hf_tx_led = -1;
  51 static int hf_1v8_led = -1;
  52 static int hf_channel = -1;
  53 static int hf_status = -1;
  54 static int hf_serial_number = -1;
  55 static int hf_part_number = -1;
  56 static int hf_packet_type = -1;
  57 static int hf_chip_status_dma_overflow = -1;
  58 static int hf_chip_status_dma_error = -1;
  59 static int hf_chip_status_cs_trigger = -1;
  60 static int hf_chip_status_fifo_overflow = -1;
  61 static int hf_chip_status_rssi_trigger = -1;
  62 static int hf_chip_status_reserved = -1;
  63 static int hf_clock_ns = -1;
  64 static int hf_clock_100ns = -1;
  65 static int hf_rssi_min = -1;
  66 static int hf_rssi_max = -1;
  67 static int hf_rssi_avg = -1;
  68 static int hf_rssi_count = -1;
  69 static int hf_data = -1;
  70 static int hf_crc_verify = -1;
  71 static int hf_paen = -1;
  72 static int hf_hgm = -1;
  73 static int hf_modulation = -1;
  74 static int hf_power_amplifier_reserved = -1;
  75 static int hf_power_amplifier_level = -1;
  76 static int hf_range_test_valid = -1;
  77 static int hf_range_test_request_power_amplifier = -1;
  78 static int hf_range_test_request_number = -1;
  79 static int hf_range_test_reply_power_amplifier = -1;
  80 static int hf_range_test_reply_number = -1;
  81 static int hf_squelch = -1;
  82 static int hf_register = -1;
  83 static int hf_register_value = -1;
  84 static int hf_access_address = -1;
  85 static int hf_high_frequency = -1;
  86 static int hf_low_frequency = -1;
  87 static int hf_rx_packets = -1;
  88 static int hf_rssi_threshold = -1;
  89 static int hf_clock_offset = -1;
  90 static int hf_afh_map = -1;
  91 static int hf_bdaddr = -1;
  92 static int hf_usb_rx_packet = -1;
  93 static int hf_usb_rx_packet_channel = -1;
  94 static int hf_spectrum_entry = -1;
  95 static int hf_frequency = -1;
  96 static int hf_rssi = -1;
  97 static int hf_cc2400_value = -1;
  98 static int hf_cc2400_main_resetn = -1;
  99 static int hf_cc2400_main_reserved_14_10 = -1;
 100 static int hf_cc2400_main_fs_force_en = -1;
 101 static int hf_cc2400_main_rxn_tx = -1;
 102 static int hf_cc2400_main_reserved_7_4 = -1;
 103 static int hf_cc2400_main_reserved_3 = -1;
 104 static int hf_cc2400_main_reserved_2 = -1;
 105 static int hf_cc2400_main_xosc16m_bypass = -1;
 106 static int hf_cc2400_main_xosc16m_en = -1;
 107 static int hf_cc2400_fsctrl_reserved = -1;
 108 static int hf_cc2400_fsctrl_lock_threshold = -1;
 109 static int hf_cc2400_fsctrl_cal_done = -1;
 110 static int hf_cc2400_fsctrl_cal_running = -1;
 111 static int hf_cc2400_fsctrl_lock_length = -1;
 112 static int hf_cc2400_fsctrl_lock_status = -1;
 113 static int hf_cc2400_fsdiv_reserved = -1;
 114 static int hf_cc2400_fsdiv_frequency = -1;
 115 static int hf_cc2400_fsdiv_freq_high = -1;
 116 static int hf_cc2400_fsdiv_freq = -1;
 117 static int hf_cc2400_mdmctrl_reserved = -1;
 118 static int hf_cc2400_mdmctrl_mod_offset = -1;
 119 static int hf_cc2400_mdmctrl_mod_dev = -1;
 120 static int hf_cc2400_agcctrl_vga_gain = -1;
 121 static int hf_cc2400_agcctrl_reserved = -1;
 122 static int hf_cc2400_agcctrl_agc_locked = -1;
 123 static int hf_cc2400_agcctrl_agc_lock = -1;
 124 static int hf_cc2400_agcctrl_agc_sync_lock = -1;
 125 static int hf_cc2400_agcctrl_vga_gain_oe = -1;
 126 static int hf_cc2400_frend_reserved_15_4 = -1;
 127 static int hf_cc2400_frend_reserved_3 = -1;
 128 static int hf_cc2400_frend_pa_level = -1;
 129 static int hf_cc2400_rssi_rssi_val = -1;
 130 static int hf_cc2400_rssi_rssi_cs_thres = -1;
 131 static int hf_cc2400_rssi_rssi_filt = -1;
 132 static int hf_cc2400_freqest_rx_freq_offset = -1;
 133 static int hf_cc2400_freqest_reserved = -1;
 134 static int hf_cc2400_iocfg_reserved = -1;
 135 static int hf_cc2400_iocfg_gio6_cfg = -1;
 136 static int hf_cc2400_iocfg_gio1_cfg = -1;
 137 static int hf_cc2400_iocfg_hssd_src = -1;
 138 static int hf_cc2400_fsmtc_tc_rxon2agcen = -1;
 139 static int hf_cc2400_fsmtc_tc_paon2switch = -1;
 140 static int hf_cc2400_fsmtc_res = -1;
 141 static int hf_cc2400_fsmtc_tc_txend2switch = -1;
 142 static int hf_cc2400_fsmtc_tc_txend2paoff = -1;
 143 static int hf_cc2400_reserved_0x0C_res_15_5 = -1;
 144 static int hf_cc2400_reserved_0x0C_res_4_0 = -1;
 145 static int hf_cc2400_manand_vga_reset_n = -1;
 146 static int hf_cc2400_manand_lock_status = -1;
 147 static int hf_cc2400_manand_balun_ctrl = -1;
 148 static int hf_cc2400_manand_rxtx = -1;
 149 static int hf_cc2400_manand_pre_pd = -1;
 150 static int hf_cc2400_manand_pa_n_pd = -1;
 151 static int hf_cc2400_manand_pa_p_pd = -1;
 152 static int hf_cc2400_manand_dac_lpf_pd = -1;
 153 static int hf_cc2400_manand_bias_pd = -1;
 154 static int hf_cc2400_manand_xosc16m_pd = -1;
 155 static int hf_cc2400_manand_chp_pd = -1;
 156 static int hf_cc2400_manand_fs_pd = -1;
 157 static int hf_cc2400_manand_adc_pd = -1;
 158 static int hf_cc2400_manand_vga_pd = -1;
 159 static int hf_cc2400_manand_rxbpf_pd = -1;
 160 static int hf_cc2400_manand_lnamix_pd = -1;
 161 static int hf_cc2400_fsmstate_reserved_15_13 = -1;
 162 static int hf_cc2400_fsmstate_fsm_state_bkpt = -1;
 163 static int hf_cc2400_fsmstate_reserved_7_5 = -1;
 164 static int hf_cc2400_fsmstate_fsm_cur_state = -1;
 165 static int hf_cc2400_adctst_reserved_15 = -1;
 166 static int hf_cc2400_adctst_adc_i = -1;
 167 static int hf_cc2400_adctst_reserved_7 = -1;
 168 static int hf_cc2400_adctst_adc_q = -1;
 169 static int hf_cc2400_rxbpftst_reserved = -1;
 170 static int hf_cc2400_rxbpftst_rxbpf_cap_oe = -1;
 171 static int hf_cc2400_rxbpftst_rxbpf_cap_o = -1;
 172 static int hf_cc2400_rxbpftst_rxbpf_cap_res = -1;
 173 static int hf_cc2400_pamtst_reserved_15_13 = -1;
 174 static int hf_cc2400_pamtst_vc_in_test_en = -1;
 175 static int hf_cc2400_pamtst_atestmod_pd = -1;
 176 static int hf_cc2400_pamtst_atestmod_mode = -1;
 177 static int hf_cc2400_pamtst_reserved_7 = -1;
 178 static int hf_cc2400_pamtst_txmix_cap_array = -1;
 179 static int hf_cc2400_pamtst_txmix_current = -1;
 180 static int hf_cc2400_pamtst_pa_current = -1;
 181 static int hf_cc2400_lmtst_reserved = -1;
 182 static int hf_cc2400_lmtst_rxmix_hgm = -1;
 183 static int hf_cc2400_lmtst_rxmix_tail = -1;
 184 static int hf_cc2400_lmtst_rxmix_vcm = -1;
 185 static int hf_cc2400_lmtst_rxmix_current = -1;
 186 static int hf_cc2400_lmtst_lna_cap_array = -1;
 187 static int hf_cc2400_lmtst_lna_lowgain = -1;
 188 static int hf_cc2400_lmtst_lna_gain = -1;
 189 static int hf_cc2400_lmtst_lna_current = -1;
 190 static int hf_cc2400_manor_vga_reset_n = -1;
 191 static int hf_cc2400_manor_lock_status = -1;
 192 static int hf_cc2400_manor_balun_ctrl = -1;
 193 static int hf_cc2400_manor_rxtx = -1;
 194 static int hf_cc2400_manor_pre_pd = -1;
 195 static int hf_cc2400_manor_pa_n_pd = -1;
 196 static int hf_cc2400_manor_pa_p_pd = -1;
 197 static int hf_cc2400_manor_dac_lpf_pd = -1;
 198 static int hf_cc2400_manor_bias_pd = -1;
 199 static int hf_cc2400_manor_xosc16m_pd = -1;
 200 static int hf_cc2400_manor_chp_pd = -1;
 201 static int hf_cc2400_manor_fs_pd = -1;
 202 static int hf_cc2400_manor_adc_pd = -1;
 203 static int hf_cc2400_manor_vga_pd = -1;
 204 static int hf_cc2400_manor_rxbpf_pd = -1;
 205 static int hf_cc2400_manor_lnamix_pd = -1;
 206 static int hf_cc2400_mdmtst0_reserved = -1;
 207 static int hf_cc2400_mdmtst0_tx_prng = -1;
 208 static int hf_cc2400_mdmtst0_tx_1mhz_offset_n = -1;
 209 static int hf_cc2400_mdmtst0_invert_data = -1;
 210 static int hf_cc2400_mdmtst0_afc_adjust_on_packet = -1;
 211 static int hf_cc2400_mdmtst0_afc_settling = -1;
 212 static int hf_cc2400_mdmtst0_afc_delta = -1;
 213 static int hf_cc2400_mdmtst1_reserved = -1;
 214 static int hf_cc2400_mdmtst1_bsync_threshold = -1;
 215 static int hf_cc2400_dactst_reserved = -1;
 216 static int hf_cc2400_dactst_dac_src = -1;
 217 static int hf_cc2400_dactst_dac_i_o = -1;
 218 static int hf_cc2400_dactst_dac_q_o = -1;
 219 static int hf_cc2400_agctst0_agc_settle_blank_dn = -1;
 220 static int hf_cc2400_agctst0_agc_win_size = -1;
 221 static int hf_cc2400_agctst0_agc_settle_peak = -1;
 222 static int hf_cc2400_agctst0_agc_settle_adc = -1;
 223 static int hf_cc2400_agctst0_agc_attempts = -1;
 224 static int hf_cc2400_agctst1_reserved = -1;
 225 static int hf_cc2400_agctst1_agc_var_gain_sat = -1;
 226 static int hf_cc2400_agctst1_agc_settle_blank_up = -1;
 227 static int hf_cc2400_agctst1_peakdet_cur_boost = -1;
 228 static int hf_cc2400_agctst1_agc_mult_slow = -1;
 229 static int hf_cc2400_agctst1_agc_settle_fixed = -1;
 230 static int hf_cc2400_agctst1_agc_settle_var = -1;
 231 static int hf_cc2400_agctst2_reserved = -1;
 232 static int hf_cc2400_agctst2_agc_backend_blanking = -1;
 233 static int hf_cc2400_agctst2_agc_adjust_m3db = -1;
 234 static int hf_cc2400_agctst2_agc_adjust_m1db = -1;
 235 static int hf_cc2400_agctst2_agc_adjust_p3db = -1;
 236 static int hf_cc2400_agctst2_agc_adjust_p1db = -1;
 237 static int hf_cc2400_fstst0_rxmixbuf_cur = -1;
 238 static int hf_cc2400_fstst0_txmixbuf_cur = -1;
 239 static int hf_cc2400_fstst0_vco_array_settle_long = -1;
 240 static int hf_cc2400_fstst0_vco_array_oe = -1;
 241 static int hf_cc2400_fstst0_vco_array_o = -1;
 242 static int hf_cc2400_fstst0_vco_array_res = -1;
 243 static int hf_cc2400_fstst1_rxbpf_locur = -1;
 244 static int hf_cc2400_fstst1_rxbpf_midcur = -1;
 245 static int hf_cc2400_fstst1_vco_current_ref = -1;
 246 static int hf_cc2400_fstst1_vco_current_k = -1;
 247 static int hf_cc2400_fstst1_vc_dac_en = -1;
 248 static int hf_cc2400_fstst1_vc_dac_val = -1;
 249 static int hf_cc2400_fstst2_reserved = -1;
 250 static int hf_cc2400_fstst2_vco_curcal_speed = -1;
 251 static int hf_cc2400_fstst2_vco_current_oe = -1;
 252 static int hf_cc2400_fstst2_vco_current_o = -1;
 253 static int hf_cc2400_fstst2_vco_current_res = -1;
 254 static int hf_cc2400_fstst3_reserved = -1;
 255 static int hf_cc2400_fstst3_chp_test_up = -1;
 256 static int hf_cc2400_fstst3_chp_test_dn = -1;
 257 static int hf_cc2400_fstst3_chp_disable = -1;
 258 static int hf_cc2400_fstst3_pd_delay = -1;
 259 static int hf_cc2400_fstst3_chp_step_period = -1;
 260 static int hf_cc2400_fstst3_stop_chp_current = -1;
 261 static int hf_cc2400_fstst3_start_chp_current = -1;
 262 static int hf_cc2400_manfidl_partnum = -1;
 263 static int hf_cc2400_manfidl_manfid = -1;
 264 static int hf_cc2400_manfidh_version = -1;
 265 static int hf_cc2400_manfidh_partnum = -1;
 266 static int hf_cc2400_grmdm_reserved = -1;
 267 static int hf_cc2400_grmdm_sync_errbits_allowed = -1;
 268 static int hf_cc2400_grmdm_pin_mode = -1;
 269 static int hf_cc2400_grmdm_packet_mode = -1;
 270 static int hf_cc2400_grmdm_pre_bytes = -1;
 271 static int hf_cc2400_grmdm_sync_word_size = -1;
 272 static int hf_cc2400_grmdm_crc_on = -1;
 273 static int hf_cc2400_grmdm_data_format = -1;
 274 static int hf_cc2400_grmdm_modulation_format = -1;
 275 static int hf_cc2400_grmdm_tx_gaussian_filter = -1;
 276 static int hf_cc2400_grdec_reserved = -1;
 277 static int hf_cc2400_grdec_ind_saturation = -1;
 278 static int hf_cc2400_grdec_dec_shift = -1;
 279 static int hf_cc2400_grdec_channel_dec = -1;
 280 static int hf_cc2400_grdec_dec_val = -1;
 281 static int hf_cc2400_pktstatus_reserved_15_11 = -1;
 282 static int hf_cc2400_pktstatus_sync_word_received = -1;
 283 static int hf_cc2400_pktstatus_crc_ok = -1;
 284 static int hf_cc2400_pktstatus_reserved_8 = -1;
 285 static int hf_cc2400_pktstatus_reserved_7_0 = -1;
 286 static int hf_cc2400_int_reserved_15_8 = -1;
 287 static int hf_cc2400_int_reserved_7 = -1;
 288 static int hf_cc2400_int_pkt_polarity = -1;
 289 static int hf_cc2400_int_fifo_polarity = -1;
 290 static int hf_cc2400_int_fifo_threshold = -1;
 291 static int hf_cc2400_reserved_0x24_res_15_14 = -1;
 292 static int hf_cc2400_reserved_0x24_res_13_10 = -1;
 293 static int hf_cc2400_reserved_0x24_res_9_7 = -1;
 294 static int hf_cc2400_reserved_0x24_res_6_0 = -1;
 295 static int hf_cc2400_reserved_0x25_res_15_12 = -1;
 296 static int hf_cc2400_reserved_0x25_res_11_0 = -1;
 297 static int hf_cc2400_reserved_0x26_res_15_10 = -1;
 298 static int hf_cc2400_reserved_0x26_res_9_0 = -1;
 299 static int hf_cc2400_reserved_0x27_res_15_8 = -1;
 300 static int hf_cc2400_reserved_0x27_res_7_3 = -1;
 301 static int hf_cc2400_reserved_0x27_res_2_0 = -1;
 302 static int hf_cc2400_reserved_0x28_res_15 = -1;
 303 static int hf_cc2400_reserved_0x28_res_14_13 = -1;
 304 static int hf_cc2400_reserved_0x28_res_12_7 = -1;
 305 static int hf_cc2400_reserved_0x28_res_6_0 = -1;
 306 static int hf_cc2400_reserved_0x29_res_15_8 = -1;
 307 static int hf_cc2400_reserved_0x29_res_7_3 = -1;
 308 static int hf_cc2400_reserved_0x29_res_2_0 = -1;
 309 static int hf_cc2400_reserved_0x2A_res_15_11 = -1;
 310 static int hf_cc2400_reserved_0x2A_res_10 = -1;
 311 static int hf_cc2400_reserved_0x2A_res_9_0 = -1;
 312 static int hf_cc2400_reserved_0x2B_res_15_14 = -1;
 313 static int hf_cc2400_reserved_0x2B_res_13 = -1;
 314 static int hf_cc2400_reserved_0x2B_res_12 = -1;
 315 static int hf_cc2400_reserved_0x2B_res_11_0 = -1;
 316 static int hf_cc2400_syncl = -1;
 317 static int hf_cc2400_synch = -1;
 318
 319 static gint ett_ubertooth = -1;
 320 static gint ett_command = -1;
 321 static gint ett_usb_rx_packet = -1;
 322 static gint ett_usb_rx_packet_data = -1;
 323 static gint ett_entry = -1;
 324 static gint ett_register_value = -1;
 325 static gint ett_fsdiv_frequency = -1;
 326
 327 static expert_field ei_unexpected_response = EI_INIT;
 328 static expert_field ei_unknown_data = EI_INIT;
 329 static expert_field ei_unexpected_data = EI_INIT;
 330
 331 static dissector_handle_t ubertooth_handle;
 332 static dissector_handle_t btle_handle;
 333
 334 static wmem_tree_t *command_info = NULL;
 335
 336 typedef struct _command_data {
 337     guint32  bus_id;
 338     guint32  device_address;
 339
 340     guint8   command;
 341     guint32  command_frame_number;
 342     gint32   register_id;
 343 } command_data_t;
 344
 345
 346 static const value_string command_vals[] = {
 347     { 0,  "Ping" },
 348     { 1,  "Rx Symbols" },
 349     { 2,  "Tx Symbols" },
 350     { 3,  "Get User LED" },
 351     { 4,  "Set User LED" },
 352     { 5,  "Get Rx LED" },
 353     { 6,  "Set Rx LED" },
 354     { 7,  "Get Tx LED" },
 355     { 8,  "Set Tx LED" },
 356     { 9,  "Get 1V8" },
 357     { 10,  "Set 1V8" },
 358     { 11,  "Get Channel" },
 359     { 12,  "Set Channel" },
 360     { 13,  "Reset" },
 361     { 14,  "Get Microcontroller Serial Number" },
 362     { 15,  "Get Microcontroller Part Number" },
 363     { 16,  "Get PAEN" },
 364     { 17,  "Set PAEN" },
 365     { 18,  "Get HGM" },
 366     { 19,  "Set HGM" },
 367     { 20,  "Tx Test" },
 368     { 21,  "Stop" },
 369     { 22,  "Get Modulation" },
 370     { 23,  "Set Modulation" },
 371     { 24,  "Set ISP" },
 372     { 25,  "Flash" },
 373     { 26,  "Bootloader Flash" },
 374     { 27,  "Spectrum Analyzer" },
 375     { 28,  "Get Power Amplifier Level" },
 376     { 29,  "Set Power Amplifier Level" },
 377     { 30,  "Repeater" },
 378     { 31,  "Range Test" },
 379     { 32,  "Range Check" },
 380     { 33,  "Get Firmware Revision Number" },
 381     { 34,  "LED Spectrum Analyzer" },
 382     { 35,  "Get Hardware Board ID" },
 383     { 36,  "Set Squelch" },
 384     { 37,  "Get Squelch" },
 385     { 38,  "Set BDADDR" },
 386     { 39,  "Start Hopping" },
 387     { 40,  "Set Clock" },
 388     { 41,  "Get Clock" },
 389     { 42,  "BTLE Sniffing" },
 390     { 43,  "Get Access Address" },
 391     { 44,  "Set Access Address" },
 392     { 45,  "Do Something" },
 393     { 46,  "Do Something Reply" },
 394     { 47,  "Get CRC Verify" },
 395     { 48,  "Set CRC Verify" },
 396     { 49,  "Poll" },
 397     { 50,  "BTLE Promiscuous Mode" },
 398     { 51,  "Set AFH Map" },
 399     { 52,  "Clear AFH Map" },
 400     { 53,  "Read Register" },
 401     { 54,  "BTLE Slave" },
 402     { 55,  "Get Compile Info" },
 403     { 56,  "BTLE Set Target" },
 404     { 0x00, NULL }
 405 };
 406 static value_string_ext(command_vals_ext) = VALUE_STRING_EXT_INIT(command_vals);
 407
 408 static const value_string board_id_vals[] = {
 409     { 0x00,  "Ubertooth Zero" },
 410     { 0x01,  "Ubertooth One" },
 411     { 0x02,  "ToorCon 13 Badge" },
 412     { 0x00, NULL }
 413 };
 414 static value_string_ext(board_id_vals_ext) = VALUE_STRING_EXT_INIT(board_id_vals);
 415
 416 static const value_string led_state_vals[] = {
 417     { 0x00,  "Off" },
 418     { 0x01,  "On" },
 419     { 0x00, NULL }
 420 };
 421 static value_string_ext(led_state_vals_ext) = VALUE_STRING_EXT_INIT(led_state_vals);
 422
 423 static const value_string state_vals[] = {
 424     { 0x00,  "False" },
 425     { 0x01,  "True" },
 426     { 0x00, NULL }
 427 };
 428 static value_string_ext(state_vals_ext) = VALUE_STRING_EXT_INIT(state_vals);
 429
 430 static const value_string packet_type_vals[] = {
 431     { 0x00,  "BR/EDR" },
 432     { 0x01,  "LE" },
 433     { 0x02,  "Message" },
 434     { 0x03,  "Keep Alive" },
 435     { 0x00, NULL }
 436 };
 437 static value_string_ext(packet_type_vals_ext) = VALUE_STRING_EXT_INIT(packet_type_vals);
 438
 439 static const value_string modulation_vals[] = {
 440     { 0x00,  "Basic Rate" },
 441     { 0x01,  "Low Energy" },
 442     { 0x02,  "802.11 FHSS" },
 443     { 0x00, NULL }
 444 };
 445 static value_string_ext(modulation_vals_ext) = VALUE_STRING_EXT_INIT(modulation_vals);
 446
 447 static const value_string register_vals[] = {
 448     { 0x00,  "MAIN" },
 449     { 0x01,  "FSCTRL" },
 450     { 0x02,  "FSDIV" },
 451     { 0x03,  "MDMCTRL" },
 452     { 0x04,  "AGCCTRL" },
 453     { 0x05,  "FREND" },
 454     { 0x06,  "RSSI" },
 455     { 0x07,  "FREQEST" },
 456     { 0x08,  "IOCFG" },
 457     { 0x0B,  "FSMTC" },
 458     { 0x0C,  "RESERVED 0x0C" },
 459     { 0x0D,  "MANAND" },
 460     { 0x0E,  "FSMSTATE" },
 461     { 0x0F,  "ADCTST" },
 462     { 0x10,  "RXBPFTST" },
 463     { 0x11,  "PAMTST" },
 464     { 0x12,  "LMTST" },
 465     { 0x13,  "MANOR" },
 466     { 0x14,  "MDMTST0" },
 467     { 0x15,  "MDMTST1" },
 468     { 0x16,  "DACTST" },
 469     { 0x17,  "AGCTST0" },
 470     { 0x18,  "AGCTST1" },
 471     { 0x19,  "AGCTST2" },
 472     { 0x1A,  "FSTST0" },
 473     { 0x1B,  "FSTST1" },
 474     { 0x1C,  "FSTST2" },
 475     { 0x1D,  "FSTST3" },
 476     { 0x1E,  "MANFIDL" },
 477     { 0x1F,  "MANFIDH" },
 478     { 0x20,  "GRMDM" },
 479     { 0x21,  "GRDEC" },
 480     { 0x22,  "PKTSTATUS" },
 481     { 0x23,  "INT" },
 482     { 0x24,  "RESERVED 0x24" },
 483     { 0x25,  "RESERVED 0x25" },
 484     { 0x26,  "RESERVED 0x26" },
 485     { 0x27,  "RESERVED 0x27" },
 486     { 0x28,  "RESERVED 0x28" },
 487     { 0x29,  "RESERVED 0x29" },
 488     { 0x2A,  "RESERVED 0x2A" },
 489     { 0x2B,  "RESERVED 0x2B" },
 490     { 0x2C,  "SYNCL" },
 491     { 0x2D,  "SYNCH" },
 492     { 0x60,  "SXOSCON" },
 493     { 0x61,  "SFSON" },
 494     { 0x62,  "SRX" },
 495     { 0x63,  "STX" },
 496     { 0x64,  "SRFOFF" },
 497     { 0x65,  "SXOSCOFF" },
 498     { 0x70,  "FIFOREG" },
 499     { 0x00, NULL }
 500 };
 501 static value_string_ext(register_vals_ext) = VALUE_STRING_EXT_INIT(register_vals);
 502
 503 static const value_string register_description_vals[] = {
 504     { 0x00,  "Main Control Register" },
 505     { 0x01,  "Frequency Synthesiser Control and Status" },
 506     { 0x02,  "Frequency Synthesiser Frequency Division Control" },
 507     { 0x03,  "Modem Control and Status" },
 508     { 0x04,  "Automatic Gain Control and Status" },
 509     { 0x05,  "Front-end Control Register" },
 510     { 0x06,  "Received Signal Strength Indicator Status and Control Register" },
 511     { 0x07,  "Received Frequency Offset Estimation" },
 512     { 0x08,  "IO Configuration Register" },
 513     { 0x0B,  "Finite State Machine Time Constants" },
 514     { 0x0C,  "Reserved Register Containing Spare Control and Status Bits" },
 515     { 0x0D,  "Manual Signal and Override Register" },
 516     { 0x0E,  "Finite State Machine Information and Breakpoint" },
 517     { 0x0F,  "Analog-to-Digital Converter Test Register" },
 518     { 0x10,  "Receiver Band-pass Filters Test Register" },
 519     { 0x11,  "Power Amplifier and Transmit Mixers Test Register" },
 520     { 0x12,  "Low Noise Amplifier and Receive Mixers Test Register" },
 521     { 0x13,  "Manual Signal or Override Register" },
 522     { 0x14,  "Modem Test Register 0" },
 523     { 0x15,  "Modem Test Register 1" },
 524     { 0x16,  "Digital-to-Analog Converter Test Register" },
 525     { 0x17,  "Automatic Gain Control Test Register 0" },
 526     { 0x18,  "Automatic Gain Control Test Register 1" },
 527     { 0x19,  "Automatic Gain Control Test Register 2" },
 528     { 0x1A,  "Frequency Synthesiser Test Register 0" },
 529     { 0x1B,  "Frequency Synthesiser Test Register 1" },
 530     { 0x1C,  "Frequency Synthesiser Test Register 2" },
 531     { 0x1D,  "Frequency Synthesiser Test Register 3" },
 532     { 0x1E,  "Manufacturer ID, Lower 16 Bit" },
 533     { 0x1F,  "Manufacturer ID, Upper 16 Bit" },
 534     { 0x20,  "Generic Radio Modem Control and Status" },
 535     { 0x21,  "Generic Radio Decimation Control and Status" },
 536     { 0x22,  "Packet Mode Status" },
 537     { 0x23,  "Interrupt Register" },
 538     { 0x24,  "Reserved 0x24" },
 539     { 0x25,  "Reserved 0x25" },
 540     { 0x26,  "Reserved 0x26" },
 541     { 0x27,  "Reserved 0x27" },
 542     { 0x28,  "Reserved 0x28" },
 543     { 0x29,  "Reserved 0x29" },
 544     { 0x2A,  "Reserved 0x2A" },
 545     { 0x2B,  "Reserved 0x2B" },
 546     { 0x2C,  "Sync Word, Lower 16 Bit" },
 547     { 0x2D,  "Sync Word, Upper 16 Bit" },
 548     { 0x60,  "Command Strobe Register: Turn on XOSC" },
 549     { 0x61,  "Command Strobe register: Start and calibrate Frequency Synthesizer and go from RX/TX to a wait mode where the Frequency Synthesizer is running" },
 550     { 0x62,  "Command Strobe register: Start RX" },
 551     { 0x63,  "Command Strobe register: Start TX (turn on Power Amplifier)" },
 552     { 0x64,  "Command Strobe register: Turn off RX/TX and Frequency Synthesizer" },
 553     { 0x65,  "Command Strobe register: Turn off XOSC" },
 554     { 0x70,  "Used to write data to and read data from the 8-bit wide 32 bytes FIFO used to buffer outgoing TX data and incoming RX data in buffered RF mode" },
 555     { 0x00, NULL }
 556 };
 557 static value_string_ext(register_description_vals_ext) = VALUE_STRING_EXT_INIT(register_description_vals);
 558
 559 static const value_string cc2400_grdec_dec_shift_vals[] = {
 560     { 0x00,  "0" },
 561     { 0x01,  "1" },
 562     { 0x02,  "-2" },
 563     { 0x03,  "-1" },
 564     { 0x00, NULL }
 565 };
 566 static value_string_ext(cc2400_grdec_dec_shift_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grdec_dec_shift_vals);
 567
 568 static const value_string cc2400_grdec_channel_dec_vals[] = {
 569     { 0x00,  "1 MHz (used for 1Mbps and 250 kbps datarates)" },
 570     { 0x01,  "500 kHz (used for 10 kbps data rate)" },
 571     { 0x02,  "250 kHz" },
 572     { 0x03,  "125 kHz" },
 573     { 0x00, NULL }
 574 };
 575 static value_string_ext(cc2400_grdec_channel_dec_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grdec_channel_dec_vals);
 576
 577 static const value_string cc2400_grmdm_pin_mode_vals[] = {
 578     { 0x00,  "Unbuffered Mode" },
 579     { 0x01,  "Buffered Mode" },
 580     { 0x02,  "HSSD Test Mode" },
 581     { 0x03,  "Unused" },
 582     { 0x00, NULL }
 583 };
 584 static value_string_ext(cc2400_grmdm_pin_mode_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_pin_mode_vals);
 585
 586 static const value_string cc2400_grmdm_pre_bytes_vals[] = {
 587     { 0x00,  "0" },
 588     { 0x01,  "1" },
 589     { 0x02,  "2" },
 590     { 0x03,  "4" },
 591     { 0x04,  "8" },
 592     { 0x05,  "16" },
 593     { 0x06,  "32" },
 594     { 0x07,  "Infinitely On" },
 595     { 0x00, NULL }
 596 };
 597 static value_string_ext(cc2400_grmdm_pre_bytes_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_pre_bytes_vals);
 598
 599 static const value_string cc2400_grmdm_sync_word_size_vals[] = {
 600     { 0x00,  "The 8 MSB bits of SYNC_WORD" },
 601     { 0x01,  "The 16 MSB bits of SYNC_WORD" },
 602     { 0x02,  "The 24 MSB bits of SYNC_WORD" },
 603     { 0x03,  "The 32 MSB bits of SYNC_WORD" },
 604     { 0x00, NULL }
 605 };
 606 static value_string_ext(cc2400_grmdm_sync_word_size_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_sync_word_size_vals);
 607
 608 static const value_string cc2400_grmdm_data_format_vals[] = {
 609     { 0x00,  "NRZ" },
 610     { 0x01,  "Manchester" },
 611     { 0x02,  "8/10 line-coding (Not applied to preambles or sync words)" },
 612     { 0x03,  "Reserved" },
 613     { 0x00, NULL }
 614 };
 615 static value_string_ext(cc2400_grmdm_data_format_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_data_format_vals);
 616
 617 static const value_string cc2400_grmdm_modulation_format_vals[] = {
 618     { 0x00,  "FSK/GFSK" },
 619     { 0x01,  "Reserved" },
 620     { 0x00, NULL }
 621 };
 622 static value_string_ext(cc2400_grmdm_modulation_format_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_modulation_format_vals);
 623
 624 static const value_string cc2400_fstst3_pd_delay_vals[] = {
 625     { 0x00,  "Short Reset Delay" },
 626     { 0x01,  "Long Reset Delay" },
 627     { 0x00, NULL }
 628 };
 629 static value_string_ext(cc2400_fstst3_pd_delay_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst3_pd_delay_vals);
 630
 631 static const value_string cc2400_fstst3_chp_step_period_vals[] = {
 632     { 0x00,  "0.25 us" },
 633     { 0x01,  "0.5 us" },
 634     { 0x02,  "1 us" },
 635     { 0x03,  "4 us" },
 636     { 0x00, NULL }
 637 };
 638 static value_string_ext(cc2400_fstst3_chp_step_period_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst3_chp_step_period_vals);
 639
 640 static const value_string cc2400_fstst2_vco_curcal_speed_vals[] = {
 641     { 0x00,  "Normal" },
 642     { 0x01,  "Undefined" },
 643     { 0x02,  "Half Speed" },
 644     { 0x03,  "Undefined" },
 645     { 0x00, NULL }
 646 };
 647 static value_string_ext(cc2400_fstst2_vco_curcal_speed_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst2_vco_curcal_speed_vals);
 648
 649 static const value_string cc2400_fstst1_rxbpf_locur_vals[] = {
 650     { 0x00,  "4 uA (nominal)" },
 651     { 0x01,  "3 uA" },
 652     { 0x00, NULL }
 653 };
 654 static value_string_ext(cc2400_fstst1_rxbpf_locur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_rxbpf_locur_vals);
 655
 656 static const value_string cc2400_fstst1_rxbpf_midcur_vals[] = {
 657     { 0x00,  "4 uA (nominal)" },
 658     { 0x01,  "3.5 uA" },
 659     { 0x00, NULL }
 660 };
 661 static value_string_ext(cc2400_fstst1_rxbpf_midcur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_rxbpf_midcur_vals);
 662
 663 static const value_string cc2400_fstst1_vc_dac_en_vals[] = {
 664     { 0x00,  "Loop filter (closed loop PLL)" },
 665     { 0x01,  "VC DAC(open loop PLL)" },
 666     { 0x00, NULL }
 667 };
 668 static value_string_ext(cc2400_fstst1_vc_dac_en_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_vc_dac_en_vals);
 669
 670 static const value_string cc2400_fstst0_rxtxmixbuf_cur_vals[] = {
 671     { 0x00,  "690 uA" },
 672     { 0x01,  "980 uA" },
 673     { 0x02,  "1.16 mA (nominal)" },
 674     { 0x03,  "1.44 mA" },
 675     { 0x00, NULL }
 676 };
 677 static value_string_ext(cc2400_fstst0_rxtxmixbuf_cur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst0_rxtxmixbuf_cur_vals);
 678
 679
 680 static const value_string cc2400_agctst1_agc_var_gain_sat_vals[] = {
 681     { 0x00,  "-1/-3 gain steps" },
 682     { 0x01,  "-3/-5 gain steps" },
 683     { 0x00, NULL }
 684 };
 685 static value_string_ext(cc2400_agctst1_agc_var_gain_sat_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_agctst1_agc_var_gain_sat_vals);
 686
 687 static const value_string cc2400_dactst_dac_src_vals[] = {
 688     { 0x00,  "Normal Operation (from Mudulator)" },
 689     { 0x01,  "The DAC_I_O and DAC_Q_O override values below" },
 690     { 0x02,  "From ADC" },
 691     { 0x03,  "I/Q after digital down-mixing and channel filtering" },
 692     { 0x04,  "Full-spectrum White Noise (from PRNG)" },
 693     { 0x05,  "RX signal magnitude / frequency filtered (from demodulator)" },
 694     { 0x06,  "RSSI/RX frequency offset estimation" },
 695     { 0x07,  "HSSD module" },
 696     { 0x00, NULL }
 697 };
 698 static value_string_ext(cc2400_dactst_dac_src_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_dactst_dac_src_vals);
 699
 700 static const value_string cc2400_mdmtst0_afc_settling_vals[] = {
 701     { 0x00,  "1 pair" },
 702     { 0x01,  "2 pairs" },
 703     { 0x02,  "4 pairs" },
 704     { 0x03,  "8 pairs" },
 705     { 0x00, NULL }
 706 };
 707 static value_string_ext(cc2400_mdmtst0_afc_settling_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_mdmtst0_afc_settling_vals);
 708
 709 static const value_string cc2400_lmtst_rxmix_tail_vals[] = {
 710     { 0x00,  "12 uA" },
 711     { 0x01,  "16 uA (Nominal)" },
 712     { 0x02,  "20 uA" },
 713     { 0x03,  "24 uA" },
 714     { 0x00, NULL }
 715 };
 716 static value_string_ext(cc2400_lmtst_rxmix_tail_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_tail_vals);
 717
 718 static const value_string cc2400_lmtst_rxmix_vcm_vals[] = {
 719     { 0x00,  "8 uA mixer current" },
 720     { 0x01,  "12 uA mixer current (Nominal)" },
 721     { 0x02,  "16 uA mixer current" },
 722     { 0x03,  "20 uA mixer current" },
 723     { 0x00, NULL }
 724 };
 725 static value_string_ext(cc2400_lmtst_rxmix_vcm_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_vcm_vals);
 726
 727 static const value_string cc2400_lmtst_rxmix_current_vals[] = {
 728     { 0x00,  "360 uA mixer current (x2)" },
 729     { 0x01,  "720 uA mixer current (x2)" },
 730     { 0x02,  "900 uA mixer current (x2) (Nominal)" },
 731     { 0x03,  "1260 uA mixer current (x2)" },
 732     { 0x00, NULL }
 733 };
 734 static value_string_ext(cc2400_lmtst_rxmix_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_current_vals);
 735
 736 static const value_string cc2400_lmtst_lna_cap_array_vals[] = {
 737     { 0x00,  "Off" },
 738     { 0x01,  "0.1pF (x2) (Nominal)" },
 739     { 0x02,  "0.2pF (x2)" },
 740     { 0x03,  "0.3pF (x2)" },
 741     { 0x00, NULL }
 742 };
 743 static value_string_ext(cc2400_lmtst_lna_cap_array_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_cap_array_vals);
 744
 745 static const value_string cc2400_lmtst_lna_lowgain_vals[] = {
 746     { 0x00,  "19 dB (Nominal)" },
 747     { 0x01,  "7 dB" },
 748     { 0x00, NULL }
 749 };
 750 static value_string_ext(cc2400_lmtst_lna_lowgain_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_lowgain_vals);
 751
 752 static const value_string cc2400_lmtst_lna_gain_vals[] = {
 753     { 0x00,  "Off (Nominal)" },
 754     { 0x01,  "100 uA LNA current" },
 755     { 0x02,  "300 uA LNA current" },
 756     { 0x03,  "1000 uA LNA current" },
 757     { 0x00, NULL }
 758 };
 759 static value_string_ext(cc2400_lmtst_lna_gain_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_gain_vals);
 760
 761 static const value_string cc2400_lmtst_lna_current_vals[] = {
 762     { 0x00,  "240 uA LNA current (x2)" },
 763     { 0x01,  "480 uA LNA current (x2)" },
 764     { 0x02,  "640 uA LNA current (x2) (Nominal)" },
 765     { 0x03,  "1280 uA LNA current (x2)" },
 766     { 0x00, NULL }
 767 };
 768 static value_string_ext(cc2400_lmtst_lna_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_current_vals);
 769
 770 static const value_string cc2400_pamtst_atestmod_mode_vals[] = {
 771     { 0x00,  "Outputs I (ATEST2) and Q (ATEST1) from RxMIX" },
 772     { 0x01,  "Inputs I (ATEST2) and Q (ATEST1) to BPF" },
 773     { 0x02,  "Outputs I (ATEST2) and Q (ATEST1) from VGA" },
 774     { 0x03,  "Inputs I (ATEST2) and Q (ATEST1) to ADC" },
 775     { 0x04,  "Outputs I (ATEST2) and Q (ATEST1) from LPF" },
 776     { 0x05,  "Inputs I (ATEST2) and Q (ATEST1) to TxMIX" },
 777     { 0x06,  "Outputs P (ATEST2) and N (ATEST1) from Prescaler" },
 778     { 0x07,  "Connects TX IF to RX IF and simultaneously the ATEST1 pin to the internal VC node" },
 779     { 0x00, NULL }
 780 };
 781 static value_string_ext(cc2400_pamtst_atestmod_mode_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_atestmod_mode_vals);
 782
 783 static const value_string cc2400_pamtst_txmix_current_vals[] = {
 784     { 0x00,  "1.72 mA" },
 785     { 0x01,  "1.88 mA" },
 786     { 0x02,  "2.05 mA" },
 787     { 0x03,  "2.21 mA" },
 788     { 0x00, NULL }
 789 };
 790 static value_string_ext(cc2400_pamtst_txmix_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_txmix_current_vals);
 791
 792 static const value_string cc2400_pamtst_pa_current_vals[] = {
 793     { 0x00,  "-3 current adjustment" },
 794     { 0x01,  "-2 current adjustment" },
 795     { 0x02,  "-1 current adjustment" },
 796     { 0x03,  "Nominal Setting" },
 797     { 0x04,  "+1 current adjustment" },
 798     { 0x05,  "+2 current adjustment" },
 799     { 0x06,  "+3 current adjustment" },
 800     { 0x07,  "+4 current adjustment" },
 801     { 0x00, NULL }
 802 };
 803 static value_string_ext(cc2400_pamtst_pa_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_pa_current_vals);
 804
 805 static const value_string cc2400_iocfg_hssd_src_vals[] = {
 806     { 0x00,  "Off" },
 807     { 0x01,  "Output AGC status (gain setting / peak detector status / accumulator value)" },
 808     { 0x02,  "Output ADC I and Q values" },
 809     { 0x03,  "Output I/Q after digital down-mixing and channel filtering" },
 810     { 0x04,  "Output RX signal magnitude / frequency unfiltered (from demodulator)" },
 811     { 0x05,  "Output RX signal magnitude / frequency filtered (from demodulator)" },
 812     { 0x06,  "Output RSSI / RX frequency offset estimation" },
 813     { 0x07,  "Input DAC values" },
 814     { 0x00, NULL }
 815 };
 816 static value_string_ext(cc2400_iocfg_hssd_src_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_iocfg_hssd_src_vals);
 817
 818 static const value_string cc2400_rssi_rssi_filt_vals[] = {
 819     { 0x00,  "0 bits (no filtering)" },
 820     { 0x01,  "1 bit" },
 821     { 0x02,  "4 bits" },
 822     { 0x03,  "8 bits" },
 823     { 0x00, NULL }
 824 };
 825 static value_string_ext(cc2400_rssi_rssi_filt_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_rssi_rssi_filt_vals);
 826
 827 static const value_string cc2400_fsctlr_lock_threshold_vals[] = {
 828     { 0x00,  "64" },
 829     { 0x01,  "128" },
 830     { 0x02,  "256" },
 831     { 0x03,  "512" },
 832     { 0x00, NULL }
 833 };
 834 static value_string_ext(cc2400_fsctlr_lock_threshold_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fsctlr_lock_threshold_vals);
 835
 836 static const value_string cc2400_fsctlr_lock_length_vals[] = {
 837     { 0x00,  "2 CLK_PRE Periods" },
 838     { 0x01,  "4 CLK_PRE Periods" },
 839     { 0x00, NULL }
 840 };
 841 static value_string_ext(cc2400_fsctlr_lock_length_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fsctlr_lock_length_vals);
 842
 843 void proto_register_ubertooth(void);
 844 void proto_reg_handoff_ubertooth(void);
 845
 846
 847 static void
 848 dissect_cc2400_register(proto_tree *tree, tvbuff_t *tvb, gint offset, guint8 register_id)
 849 {
 850     proto_item  *sub_item;
 851     proto_item  *sub_tree;
 852
 853     switch (register_id) {
 854     case 0x00: /* MAIN */
 855         proto_tree_add_item(tree, hf_cc2400_main_resetn, tvb, offset, 2, ENC_BIG_ENDIAN);
 856         proto_tree_add_item(tree, hf_cc2400_main_reserved_14_10, tvb, offset, 2, ENC_BIG_ENDIAN);
 857         proto_tree_add_item(tree, hf_cc2400_main_fs_force_en, tvb, offset, 2, ENC_BIG_ENDIAN);
 858         proto_tree_add_item(tree, hf_cc2400_main_rxn_tx, tvb, offset, 2, ENC_BIG_ENDIAN);
 859         proto_tree_add_item(tree, hf_cc2400_main_reserved_7_4, tvb, offset, 2, ENC_BIG_ENDIAN);
 860         proto_tree_add_item(tree, hf_cc2400_main_reserved_3, tvb, offset, 2, ENC_BIG_ENDIAN);
 861         proto_tree_add_item(tree, hf_cc2400_main_reserved_2, tvb, offset, 2, ENC_BIG_ENDIAN);
 862         proto_tree_add_item(tree, hf_cc2400_main_xosc16m_bypass, tvb, offset, 2, ENC_BIG_ENDIAN);
 863         proto_tree_add_item(tree, hf_cc2400_main_xosc16m_en, tvb, offset, 2, ENC_BIG_ENDIAN);
 864         break;
 865     case 0x01: /* FSCTRL */
 866         proto_tree_add_item(tree, hf_cc2400_fsctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 867         proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
 868         proto_tree_add_item(tree, hf_cc2400_fsctrl_cal_done, tvb, offset, 2, ENC_BIG_ENDIAN);
 869         proto_tree_add_item(tree, hf_cc2400_fsctrl_cal_running, tvb, offset, 2, ENC_BIG_ENDIAN);
 870         proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_length, tvb, offset, 2, ENC_BIG_ENDIAN);
 871         proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
 872         break;
 873     case 0x02: /* FSDIV */
 874         proto_tree_add_item(tree, hf_cc2400_fsdiv_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 875         sub_item = proto_tree_add_item(tree, hf_cc2400_fsdiv_frequency, tvb, offset, 2, ENC_BIG_ENDIAN);
 876         sub_tree = proto_item_add_subtree(sub_item, ett_fsdiv_frequency);
 877
 878         proto_tree_add_item(sub_tree, hf_cc2400_fsdiv_freq_high, tvb, offset, 2, ENC_BIG_ENDIAN);
 879         proto_tree_add_item(sub_tree, hf_cc2400_fsdiv_freq, tvb, offset, 2, ENC_BIG_ENDIAN);
 880         break;
 881     case 0x03: /* MDMCTRL */
 882         proto_tree_add_item(tree, hf_cc2400_mdmctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 883         proto_tree_add_item(tree, hf_cc2400_mdmctrl_mod_offset, tvb, offset, 2, ENC_BIG_ENDIAN);
 884         proto_tree_add_item(tree, hf_cc2400_mdmctrl_mod_dev, tvb, offset, 2, ENC_BIG_ENDIAN);
 885         break;
 886     case 0x04: /* AGCCTRL */
 887         proto_tree_add_item(tree, hf_cc2400_agcctrl_vga_gain, tvb, offset, 2, ENC_BIG_ENDIAN);
 888         proto_tree_add_item(tree, hf_cc2400_agcctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 889         proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_locked, tvb, offset, 2, ENC_BIG_ENDIAN);
 890         proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_lock, tvb, offset, 2, ENC_BIG_ENDIAN);
 891         proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_sync_lock, tvb, offset, 2, ENC_BIG_ENDIAN);
 892         proto_tree_add_item(tree, hf_cc2400_agcctrl_vga_gain_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
 893         break;
 894     case 0x05: /* FREND  */
 895         proto_tree_add_item(tree, hf_cc2400_frend_reserved_15_4, tvb, offset, 2, ENC_BIG_ENDIAN);
 896         proto_tree_add_item(tree, hf_cc2400_frend_reserved_3, tvb, offset, 2, ENC_BIG_ENDIAN);
 897         proto_tree_add_item(tree, hf_cc2400_frend_pa_level, tvb, offset, 2, ENC_BIG_ENDIAN);
 898         break;
 899     case 0x06: /* RSSI */
 900         proto_tree_add_item(tree, hf_cc2400_rssi_rssi_val, tvb, offset, 2, ENC_BIG_ENDIAN);
 901         proto_tree_add_item(tree, hf_cc2400_rssi_rssi_cs_thres, tvb, offset, 2, ENC_BIG_ENDIAN);
 902         proto_tree_add_item(tree, hf_cc2400_rssi_rssi_filt, tvb, offset, 2, ENC_BIG_ENDIAN);
 903         break;
 904     case 0x07: /* FREQEST */
 905         proto_tree_add_item(tree, hf_cc2400_freqest_rx_freq_offset, tvb, offset, 2, ENC_BIG_ENDIAN);
 906         proto_tree_add_item(tree, hf_cc2400_freqest_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 907         break;
 908     case 0x08: /* IOCFG */
 909         proto_tree_add_item(tree, hf_cc2400_iocfg_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 910         proto_tree_add_item(tree, hf_cc2400_iocfg_gio6_cfg, tvb, offset, 2, ENC_BIG_ENDIAN);
 911         proto_tree_add_item(tree, hf_cc2400_iocfg_gio1_cfg, tvb, offset, 2, ENC_BIG_ENDIAN);
 912         proto_tree_add_item(tree, hf_cc2400_iocfg_hssd_src, tvb, offset, 2, ENC_BIG_ENDIAN);
 913         break;
 914     case 0x0B: /* FSMTC */
 915         proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_rxon2agcen, tvb, offset, 2, ENC_BIG_ENDIAN);
 916         proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_paon2switch, tvb, offset, 2, ENC_BIG_ENDIAN);
 917         proto_tree_add_item(tree, hf_cc2400_fsmtc_res, tvb, offset, 2, ENC_BIG_ENDIAN);
 918         proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_txend2switch, tvb, offset, 2, ENC_BIG_ENDIAN);
 919         proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_txend2paoff, tvb, offset, 2, ENC_BIG_ENDIAN);
 920         break;
 921     case 0x0C: /* Reserved */
 922         proto_tree_add_item(tree, hf_cc2400_reserved_0x0C_res_15_5, tvb, offset, 2, ENC_BIG_ENDIAN);
 923         proto_tree_add_item(tree, hf_cc2400_reserved_0x0C_res_4_0, tvb, offset, 2, ENC_BIG_ENDIAN);
 924         break;
 925     case 0x0D: /* MANAND */
 926         proto_tree_add_item(tree, hf_cc2400_manand_vga_reset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
 927         proto_tree_add_item(tree, hf_cc2400_manand_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
 928         proto_tree_add_item(tree, hf_cc2400_manand_balun_ctrl, tvb, offset, 2, ENC_BIG_ENDIAN);
 929         proto_tree_add_item(tree, hf_cc2400_manand_rxtx, tvb, offset, 2, ENC_BIG_ENDIAN);
 930         proto_tree_add_item(tree, hf_cc2400_manand_pre_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 931         proto_tree_add_item(tree, hf_cc2400_manand_pa_n_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 932         proto_tree_add_item(tree, hf_cc2400_manand_pa_p_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 933         proto_tree_add_item(tree, hf_cc2400_manand_dac_lpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 934         proto_tree_add_item(tree, hf_cc2400_manand_bias_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 935         proto_tree_add_item(tree, hf_cc2400_manand_xosc16m_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 936         proto_tree_add_item(tree, hf_cc2400_manand_chp_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 937         proto_tree_add_item(tree, hf_cc2400_manand_fs_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 938         proto_tree_add_item(tree, hf_cc2400_manand_adc_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 939         proto_tree_add_item(tree, hf_cc2400_manand_vga_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 940         proto_tree_add_item(tree, hf_cc2400_manand_rxbpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 941         proto_tree_add_item(tree, hf_cc2400_manand_lnamix_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 942         break;
 943     case 0x0E: /* FSMSTATE */
 944         proto_tree_add_item(tree, hf_cc2400_fsmstate_reserved_15_13, tvb, offset, 2, ENC_BIG_ENDIAN);
 945         proto_tree_add_item(tree, hf_cc2400_fsmstate_fsm_state_bkpt, tvb, offset, 2, ENC_BIG_ENDIAN);
 946         proto_tree_add_item(tree, hf_cc2400_fsmstate_reserved_7_5, tvb, offset, 2, ENC_BIG_ENDIAN);
 947         proto_tree_add_item(tree, hf_cc2400_fsmstate_fsm_cur_state, tvb, offset, 2, ENC_BIG_ENDIAN);
 948         break;
 949     case 0x0F: /* ADCTST */
 950         proto_tree_add_item(tree, hf_cc2400_adctst_reserved_15, tvb, offset, 2, ENC_BIG_ENDIAN);
 951         proto_tree_add_item(tree, hf_cc2400_adctst_adc_i, tvb, offset, 2, ENC_BIG_ENDIAN);
 952         proto_tree_add_item(tree, hf_cc2400_adctst_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
 953         proto_tree_add_item(tree, hf_cc2400_adctst_adc_q, tvb, offset, 2, ENC_BIG_ENDIAN);
 954         break;
 955     case 0x10: /* RXBPFTST */
 956         proto_tree_add_item(tree, hf_cc2400_rxbpftst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 957         proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
 958         proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_o, tvb, offset, 2, ENC_BIG_ENDIAN);
 959         proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_res, tvb, offset, 2, ENC_BIG_ENDIAN);
 960         break;
 961     case 0x11: /* PAMTST */
 962         proto_tree_add_item(tree, hf_cc2400_pamtst_reserved_15_13, tvb, offset, 2, ENC_BIG_ENDIAN);
 963         proto_tree_add_item(tree, hf_cc2400_pamtst_vc_in_test_en, tvb, offset, 2, ENC_BIG_ENDIAN);
 964         proto_tree_add_item(tree, hf_cc2400_pamtst_atestmod_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 965         proto_tree_add_item(tree, hf_cc2400_pamtst_atestmod_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
 966         proto_tree_add_item(tree, hf_cc2400_pamtst_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
 967         proto_tree_add_item(tree, hf_cc2400_pamtst_txmix_cap_array, tvb, offset, 2, ENC_BIG_ENDIAN);
 968         proto_tree_add_item(tree, hf_cc2400_pamtst_txmix_current, tvb, offset, 2, ENC_BIG_ENDIAN);
 969         proto_tree_add_item(tree, hf_cc2400_pamtst_pa_current, tvb, offset, 2, ENC_BIG_ENDIAN);
 970         break;
 971     case 0x12: /* LMTST */
 972         proto_tree_add_item(tree, hf_cc2400_lmtst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
 973         proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_hgm, tvb, offset, 2, ENC_BIG_ENDIAN);
 974         proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_tail, tvb, offset, 2, ENC_BIG_ENDIAN);
 975         proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_vcm, tvb, offset, 2, ENC_BIG_ENDIAN);
 976         proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_current, tvb, offset, 2, ENC_BIG_ENDIAN);
 977         proto_tree_add_item(tree, hf_cc2400_lmtst_lna_cap_array, tvb, offset, 2, ENC_BIG_ENDIAN);
 978         proto_tree_add_item(tree, hf_cc2400_lmtst_lna_lowgain, tvb, offset, 2, ENC_BIG_ENDIAN);
 979         proto_tree_add_item(tree, hf_cc2400_lmtst_lna_gain, tvb, offset, 2, ENC_BIG_ENDIAN);
 980         proto_tree_add_item(tree, hf_cc2400_lmtst_lna_current, tvb, offset, 2, ENC_BIG_ENDIAN);
 981         break;
 982     case 0x13: /* MANOR */
 983         proto_tree_add_item(tree, hf_cc2400_manor_vga_reset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
 984         proto_tree_add_item(tree, hf_cc2400_manor_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
 985         proto_tree_add_item(tree, hf_cc2400_manor_balun_ctrl, tvb, offset, 2, ENC_BIG_ENDIAN);
 986         proto_tree_add_item(tree, hf_cc2400_manor_rxtx, tvb, offset, 2, ENC_BIG_ENDIAN);
 987         proto_tree_add_item(tree, hf_cc2400_manor_pre_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 988         proto_tree_add_item(tree, hf_cc2400_manor_pa_n_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 989         proto_tree_add_item(tree, hf_cc2400_manor_pa_p_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 990         proto_tree_add_item(tree, hf_cc2400_manor_dac_lpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 991         proto_tree_add_item(tree, hf_cc2400_manor_bias_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 992         proto_tree_add_item(tree, hf_cc2400_manor_xosc16m_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 993         proto_tree_add_item(tree, hf_cc2400_manor_chp_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 994         proto_tree_add_item(tree, hf_cc2400_manor_fs_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 995         proto_tree_add_item(tree, hf_cc2400_manor_adc_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 996         proto_tree_add_item(tree, hf_cc2400_manor_vga_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 997         proto_tree_add_item(tree, hf_cc2400_manor_rxbpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 998         proto_tree_add_item(tree, hf_cc2400_manor_lnamix_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
 999         break;
1000     case 0x14: /* MDMTST0 */
1001         proto_tree_add_item(tree, hf_cc2400_mdmtst0_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1002         proto_tree_add_item(tree, hf_cc2400_mdmtst0_tx_prng, tvb, offset, 2, ENC_BIG_ENDIAN);
1003         proto_tree_add_item(tree, hf_cc2400_mdmtst0_tx_1mhz_offset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
1004         proto_tree_add_item(tree, hf_cc2400_mdmtst0_invert_data, tvb, offset, 2, ENC_BIG_ENDIAN);
1005         proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_adjust_on_packet, tvb, offset, 2, ENC_BIG_ENDIAN);
1006         proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_settling, tvb, offset, 2, ENC_BIG_ENDIAN);
1007         proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_delta, tvb, offset, 2, ENC_BIG_ENDIAN);
1008         break;
1009     case 0x15: /* MDMTST1 */
1010         proto_tree_add_item(tree, hf_cc2400_mdmtst1_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1011         proto_tree_add_item(tree, hf_cc2400_mdmtst1_bsync_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
1012         break;
1013     case 0x16: /* DACTST */
1014         proto_tree_add_item(tree, hf_cc2400_dactst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1015         proto_tree_add_item(tree, hf_cc2400_dactst_dac_src, tvb, offset, 2, ENC_BIG_ENDIAN);
1016         proto_tree_add_item(tree, hf_cc2400_dactst_dac_i_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1017         proto_tree_add_item(tree, hf_cc2400_dactst_dac_q_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1018         break;
1019     case 0x17: /* AGCTST0 */
1020         proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_blank_dn, tvb, offset, 2, ENC_BIG_ENDIAN);
1021         proto_tree_add_item(tree, hf_cc2400_agctst0_agc_win_size, tvb, offset, 2, ENC_BIG_ENDIAN);
1022         proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_peak, tvb, offset, 2, ENC_BIG_ENDIAN);
1023         proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_adc, tvb, offset, 2, ENC_BIG_ENDIAN);
1024         proto_tree_add_item(tree, hf_cc2400_agctst0_agc_attempts, tvb, offset, 2, ENC_BIG_ENDIAN);
1025         break;
1026     case 0x18: /* AGCTST1 */
1027         proto_tree_add_item(tree, hf_cc2400_agctst1_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1028         proto_tree_add_item(tree, hf_cc2400_agctst1_agc_var_gain_sat, tvb, offset, 2, ENC_BIG_ENDIAN);
1029         proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_blank_up, tvb, offset, 2, ENC_BIG_ENDIAN);
1030         proto_tree_add_item(tree, hf_cc2400_agctst1_peakdet_cur_boost, tvb, offset, 2, ENC_BIG_ENDIAN);
1031         proto_tree_add_item(tree, hf_cc2400_agctst1_agc_mult_slow, tvb, offset, 2, ENC_BIG_ENDIAN);
1032         proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_fixed, tvb, offset, 2, ENC_BIG_ENDIAN);
1033         proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_var, tvb, offset, 2, ENC_BIG_ENDIAN);
1034         break;
1035     case 0x19: /* AGCTST2 */
1036         proto_tree_add_item(tree, hf_cc2400_agctst2_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1037         proto_tree_add_item(tree, hf_cc2400_agctst2_agc_backend_blanking, tvb, offset, 2, ENC_BIG_ENDIAN);
1038         proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_m3db, tvb, offset, 2, ENC_BIG_ENDIAN);
1039         proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_m1db, tvb, offset, 2, ENC_BIG_ENDIAN);
1040         proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_p3db, tvb, offset, 2, ENC_BIG_ENDIAN);
1041         proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_p1db, tvb, offset, 2, ENC_BIG_ENDIAN);
1042         break;
1043     case 0x1A: /* FSTST0 */
1044         proto_tree_add_item(tree, hf_cc2400_fstst0_rxmixbuf_cur, tvb, offset, 2, ENC_BIG_ENDIAN);
1045         proto_tree_add_item(tree, hf_cc2400_fstst0_txmixbuf_cur, tvb, offset, 2, ENC_BIG_ENDIAN);
1046         proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_settle_long, tvb, offset, 2, ENC_BIG_ENDIAN);
1047         proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
1048         proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1049         proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1050         break;
1051     case 0x1B: /* FSTST1 */
1052         proto_tree_add_item(tree, hf_cc2400_fstst1_rxbpf_locur, tvb, offset, 2, ENC_BIG_ENDIAN);
1053         proto_tree_add_item(tree, hf_cc2400_fstst1_rxbpf_midcur, tvb, offset, 2, ENC_BIG_ENDIAN);
1054         proto_tree_add_item(tree, hf_cc2400_fstst1_vco_current_ref, tvb, offset, 2, ENC_BIG_ENDIAN);
1055         proto_tree_add_item(tree, hf_cc2400_fstst1_vco_current_k, tvb, offset, 2, ENC_BIG_ENDIAN);
1056         proto_tree_add_item(tree, hf_cc2400_fstst1_vc_dac_en, tvb, offset, 2, ENC_BIG_ENDIAN);
1057         proto_tree_add_item(tree, hf_cc2400_fstst1_vc_dac_val, tvb, offset, 2, ENC_BIG_ENDIAN);
1058         break;
1059     case 0x1C: /* FSTST2 */
1060         proto_tree_add_item(tree, hf_cc2400_fstst2_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1061         proto_tree_add_item(tree, hf_cc2400_fstst2_vco_curcal_speed, tvb, offset, 2, ENC_BIG_ENDIAN);
1062         proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
1063         proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1064         proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1065         break;
1066     case 0x1D: /* FSTST3 */
1067         proto_tree_add_item(tree, hf_cc2400_fstst3_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1068         proto_tree_add_item(tree, hf_cc2400_fstst3_chp_test_up, tvb, offset, 2, ENC_BIG_ENDIAN);
1069         proto_tree_add_item(tree, hf_cc2400_fstst3_chp_test_dn, tvb, offset, 2, ENC_BIG_ENDIAN);
1070         proto_tree_add_item(tree, hf_cc2400_fstst3_chp_disable, tvb, offset, 2, ENC_BIG_ENDIAN);
1071         proto_tree_add_item(tree, hf_cc2400_fstst3_pd_delay, tvb, offset, 2, ENC_BIG_ENDIAN);
1072         proto_tree_add_item(tree, hf_cc2400_fstst3_chp_step_period, tvb, offset, 2, ENC_BIG_ENDIAN);
1073         proto_tree_add_item(tree, hf_cc2400_fstst3_stop_chp_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1074         proto_tree_add_item(tree, hf_cc2400_fstst3_start_chp_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1075         break;
1076     case 0x1E: /* MANFIDL */
1077         proto_tree_add_item(tree, hf_cc2400_manfidl_partnum, tvb, offset, 2, ENC_BIG_ENDIAN);
1078         proto_tree_add_item(tree, hf_cc2400_manfidl_manfid, tvb, offset, 2, ENC_BIG_ENDIAN);
1079         break;
1080     case 0x1F: /* MANFIDH */
1081         proto_tree_add_item(tree, hf_cc2400_manfidh_version, tvb, offset, 2, ENC_BIG_ENDIAN);
1082         proto_tree_add_item(tree, hf_cc2400_manfidh_partnum, tvb, offset, 2, ENC_BIG_ENDIAN);
1083         break;
1084     case 0x20: /* GRMDM */
1085         proto_tree_add_item(tree, hf_cc2400_grmdm_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1086         proto_tree_add_item(tree, hf_cc2400_grmdm_sync_errbits_allowed, tvb, offset, 2, ENC_BIG_ENDIAN);
1087         proto_tree_add_item(tree, hf_cc2400_grmdm_pin_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
1088         proto_tree_add_item(tree, hf_cc2400_grmdm_packet_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
1089         proto_tree_add_item(tree, hf_cc2400_grmdm_pre_bytes, tvb, offset, 2, ENC_BIG_ENDIAN);
1090         proto_tree_add_item(tree, hf_cc2400_grmdm_sync_word_size, tvb, offset, 2, ENC_BIG_ENDIAN);
1091         proto_tree_add_item(tree, hf_cc2400_grmdm_crc_on, tvb, offset, 2, ENC_BIG_ENDIAN);
1092         proto_tree_add_item(tree, hf_cc2400_grmdm_data_format, tvb, offset, 2, ENC_BIG_ENDIAN);
1093         proto_tree_add_item(tree, hf_cc2400_grmdm_modulation_format, tvb, offset, 2, ENC_BIG_ENDIAN);
1094         proto_tree_add_item(tree, hf_cc2400_grmdm_tx_gaussian_filter, tvb, offset, 2, ENC_BIG_ENDIAN);
1095         break;
1096     case 0x21: /* GRDEC */
1097         proto_tree_add_item(tree, hf_cc2400_grdec_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1098         proto_tree_add_item(tree, hf_cc2400_grdec_ind_saturation, tvb, offset, 2, ENC_BIG_ENDIAN);
1099         proto_tree_add_item(tree, hf_cc2400_grdec_dec_shift, tvb, offset, 2, ENC_BIG_ENDIAN);
1100         proto_tree_add_item(tree, hf_cc2400_grdec_channel_dec, tvb, offset, 2, ENC_BIG_ENDIAN);
1101         proto_tree_add_item(tree, hf_cc2400_grdec_dec_val, tvb, offset, 2, ENC_BIG_ENDIAN);
1102         break;
1103     case 0x22: /* PKTSTATUS */
1104         proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_15_11, tvb, offset, 2, ENC_BIG_ENDIAN);
1105         proto_tree_add_item(tree, hf_cc2400_pktstatus_sync_word_received, tvb, offset, 2, ENC_BIG_ENDIAN);
1106         proto_tree_add_item(tree, hf_cc2400_pktstatus_crc_ok, tvb, offset, 2, ENC_BIG_ENDIAN);
1107         proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1108         proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_7_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1109         break;
1110     case 0x23: /* INT */
1111         proto_tree_add_item(tree, hf_cc2400_int_reserved_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1112         proto_tree_add_item(tree, hf_cc2400_int_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1113         proto_tree_add_item(tree, hf_cc2400_int_pkt_polarity, tvb, offset, 2, ENC_BIG_ENDIAN);
1114         proto_tree_add_item(tree, hf_cc2400_int_fifo_polarity, tvb, offset, 2, ENC_BIG_ENDIAN);
1115         proto_tree_add_item(tree, hf_cc2400_int_fifo_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
1116         break;
1117     case 0x24: /* Reserved */
1118         proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_15_14, tvb, offset, 2, ENC_BIG_ENDIAN);
1119         proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_13_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1120         proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_9_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1121         proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_6_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1122         break;
1123     case 0x25: /* Reserved */
1124         proto_tree_add_item(tree, hf_cc2400_reserved_0x25_res_15_12, tvb, offset, 2, ENC_BIG_ENDIAN);
1125         proto_tree_add_item(tree, hf_cc2400_reserved_0x25_res_11_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1126         break;
1127     case 0x26: /* Reserved */
1128         proto_tree_add_item(tree, hf_cc2400_reserved_0x26_res_15_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1129         proto_tree_add_item(tree, hf_cc2400_reserved_0x26_res_9_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1130         break;
1131     case 0x27: /* Reserved */
1132         proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1133         proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_7_3, tvb, offset, 2, ENC_BIG_ENDIAN);
1134         proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_2_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1135         break;
1136     case 0x28: /* Reserved */
1137         proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_15, tvb, offset, 2, ENC_BIG_ENDIAN);
1138         proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_14_13, tvb, offset, 2, ENC_BIG_ENDIAN);
1139         proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_12_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1140         proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_6_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1141         break;
1142     case 0x29: /* Reserved */
1143         proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1144         proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_7_3, tvb, offset, 2, ENC_BIG_ENDIAN);
1145         proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_2_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1146         break;
1147     case 0x2A: /* Reserved */
1148         proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_15_11, tvb, offset, 2, ENC_BIG_ENDIAN);
1149         proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1150         proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_9_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1151         break;
1152     case 0x2B: /* Reserved */
1153         proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_15_14, tvb, offset, 2, ENC_BIG_ENDIAN);
1154         proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_13, tvb, offset, 2, ENC_BIG_ENDIAN);
1155         proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_12, tvb, offset, 2, ENC_BIG_ENDIAN);
1156         proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_11_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1157         break;
1158     case 0x2C: /* SYNCL */
1159         proto_tree_add_item(tree, hf_cc2400_syncl, tvb, offset, 2, ENC_BIG_ENDIAN);
1160         break;
1161     case 0x2D: /* SYNCH */
1162         proto_tree_add_item(tree, hf_cc2400_synch, tvb, offset, 2, ENC_BIG_ENDIAN);
1163         break;
1164     default:
1165         proto_tree_add_item(tree, hf_cc2400_value, tvb, offset, 2, ENC_BIG_ENDIAN);
1166     }
1167 }
1168
1169 static gint
1170 dissect_usb_rx_packet(proto_tree *main_tree, proto_tree *tree, packet_info *pinfo, tvbuff_t *tvb, gint offset, gint16 command)
1171 {
1172     proto_item  *sub_item;
1173     proto_item  *sub_tree;
1174     proto_item  *data_item;
1175     proto_item  *data_tree;
1176     proto_item  *entry_item;
1177     proto_item  *entry_tree;
1178     gint         i_spec;
1179     gint         length;
1180     tvbuff_t    *next_tvb;
1181
1182     sub_item = proto_tree_add_item(tree, hf_usb_rx_packet, tvb, offset, 64, ENC_NA);
1183     sub_tree = proto_item_add_subtree(sub_item, ett_usb_rx_packet);
1184
1185     proto_tree_add_item(sub_tree, hf_packet_type, tvb, offset, 1, ENC_NA);
1186     offset += 1;
1187
1188     proto_tree_add_item(sub_tree, hf_chip_status_reserved, tvb, offset, 1, ENC_NA);
1189     proto_tree_add_item(sub_tree, hf_chip_status_rssi_trigger, tvb, offset, 1, ENC_NA);
1190     proto_tree_add_item(sub_tree, hf_chip_status_cs_trigger, tvb, offset, 1, ENC_NA);
1191     proto_tree_add_item(sub_tree, hf_chip_status_fifo_overflow, tvb, offset, 1, ENC_NA);
1192     proto_tree_add_item(sub_tree, hf_chip_status_dma_error, tvb, offset, 1, ENC_NA);
1193     proto_tree_add_item(sub_tree, hf_chip_status_dma_overflow, tvb, offset, 1, ENC_NA);
1194     offset += 1;
1195
1196     proto_tree_add_item(sub_tree, hf_usb_rx_packet_channel, tvb, offset, 1, ENC_NA);
1197     offset += 1;
1198
1199     proto_tree_add_item(sub_tree, hf_clock_ns, tvb, offset, 1, ENC_NA);
1200     offset += 1;
1201
1202     proto_tree_add_item(sub_tree, hf_clock_100ns, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1203     offset += 4;
1204
1205     proto_tree_add_item(sub_tree, hf_rssi_max, tvb, offset, 1, ENC_NA);
1206     offset += 1;
1207
1208     proto_tree_add_item(sub_tree, hf_rssi_min, tvb, offset, 1, ENC_NA);
1209     offset += 1;
1210
1211     proto_tree_add_item(sub_tree, hf_rssi_avg, tvb, offset, 1, ENC_NA);
1212     offset += 1;
1213
1214     proto_tree_add_item(sub_tree, hf_rssi_count, tvb, offset, 1, ENC_NA);
1215     offset += 1;
1216
1217     proto_tree_add_item(sub_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1218     offset += 2;
1219
1220     data_item = proto_tree_add_item(sub_tree, hf_data, tvb, offset, 50, ENC_NA);
1221     data_tree = proto_item_add_subtree(data_item, ett_usb_rx_packet_data);
1222
1223     switch (command) {
1224     case 27: /* Spectrum Analyzer */
1225         for (i_spec = 0; i_spec < 48; i_spec += 3) {
1226             entry_item = proto_tree_add_item(data_tree, hf_spectrum_entry, tvb, offset, 3, ENC_NA);
1227             entry_tree = proto_item_add_subtree(entry_item, ett_entry);
1228
1229             proto_tree_add_item(entry_tree, hf_frequency, tvb, offset, 2, ENC_BIG_ENDIAN);
1230             offset += 2;
1231
1232             proto_tree_add_item(entry_tree, hf_rssi, tvb, offset, 1, ENC_NA);
1233             offset += 1;
1234
1235             proto_item_append_text(entry_item, " Frequency = %u MHz, RSSI = %i", tvb_get_ntohs(tvb, offset - 3), (gint8) tvb_get_guint8(tvb, offset - 1));
1236         }
1237
1238         proto_tree_add_item(data_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1239         offset += 2;
1240         break;
1241     case 49: /* Poll */
1242         length = 9; /* From BTLE: AccessAddress (4) + Header (2) + Length from Header (below) + CRC (3) */
1243
1244         if (tvb_get_letohl(tvb, offset) == ACCESS_ADDRESS_ADVERTISING)
1245             length += tvb_get_guint8(tvb, offset + 5) & 0x3f;
1246         else
1247             length += tvb_get_guint8(tvb, offset + 5) & 0x1f;
1248
1249         next_tvb = tvb_new_subset_length(tvb, offset, length);
1250         call_dissector(btle_handle, next_tvb, pinfo, main_tree);
1251         offset += length;
1252
1253         if (tvb_length_remaining(tvb, offset) > 0) {
1254             proto_tree_add_item(data_tree, hf_reserved, tvb, offset, -1, ENC_NA);
1255             offset += tvb_length_remaining(tvb, offset);
1256         }
1257
1258         break;
1259     default:
1260         offset += 50;
1261     }
1262
1263     return offset;
1264 }
1265
1266 static gint
1267 dissect_ubertooth(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, void *data)
1268 {
1269     proto_item       *main_tree = NULL;
1270     proto_tree       *main_item = NULL;
1271     proto_item       *command_item;
1272     proto_item       *command_tree;
1273     proto_item       *sub_item;
1274     proto_item       *sub_tree;
1275     gint              offset = 0;
1276     usb_conv_info_t  *usb_conv_info = (usb_conv_info_t *)data;
1277     gint              p2p_dir_save;
1278     guint8            command;
1279     gint16            command_response = -1;
1280     command_data_t   *command_data = NULL;
1281     wmem_tree_t      *wmem_tree;
1282     wmem_tree_key_t   key[5];
1283     guint32           bus_id;
1284     guint32           device_address;
1285     guint32           k_bus_id;
1286     guint32           k_device_address;
1287     guint32           k_frame_number;
1288     guint8            length;
1289     guint32          *serial;
1290     guint8            status;
1291     gint32            register_id = -1;
1292
1293     main_item = proto_tree_add_item(tree, proto_ubertooth, tvb, offset, -1, ENC_NA);
1294     main_tree = proto_item_add_subtree(main_item, ett_ubertooth);
1295
1296     col_set_str(pinfo->cinfo, COL_PROTOCOL, "UBERTOOTH");
1297
1298     DISSECTOR_ASSERT(usb_conv_info);
1299
1300     p2p_dir_save = pinfo->p2p_dir;
1301     pinfo->p2p_dir = (usb_conv_info->is_request) ? P2P_DIR_SENT : P2P_DIR_RECV;
1302
1303     switch (pinfo->p2p_dir) {
1304
1305     case P2P_DIR_SENT:
1306         col_add_str(pinfo->cinfo, COL_INFO, "Sent ");
1307         break;
1308
1309     case P2P_DIR_RECV:
1310         col_add_str(pinfo->cinfo, COL_INFO, "Rcvd ");
1311         break;
1312
1313     default:
1314         col_add_fstr(pinfo->cinfo, COL_INFO, "Unknown direction %d ",
1315             pinfo->p2p_dir);
1316         break;
1317     }
1318
1319     bus_id         = usb_conv_info->bus_id;
1320     device_address = usb_conv_info->device_address;
1321
1322     k_bus_id          = bus_id;
1323     k_device_address  = device_address;
1324     k_frame_number    = pinfo->fd->num;
1325
1326     key[0].length = 1;
1327     key[0].key = &k_bus_id;
1328     key[1].length = 1;
1329     key[1].key = &k_device_address;
1330
1331
1332     if (usb_conv_info->is_setup) {
1333         proto_tree_add_item(main_tree, hf_command, tvb, offset, 1, ENC_NA);
1334         command = tvb_get_guint8(tvb, offset);
1335         offset += 1;
1336
1337         col_append_fstr(pinfo->cinfo, COL_INFO, "Command: %s",
1338                 val_to_str_ext_const(command, &command_vals_ext, "Unknown"));
1339
1340         switch (command) {
1341 /* Group of commands with parameters by "setup" */
1342         case 1: /* Rx Symbols */
1343         case 4: /* Set User LED */
1344         case 6: /* Set Rx LED */
1345         case 8: /* Set Tx LED */
1346         case 10: /* Set 1V8 */
1347         case 12: /* Set Channel */
1348         case 17: /* Set PAEN */
1349         case 19: /* Set HGM */
1350         case 23: /* Set Modulation */
1351         case 29: /* Set Power Amplifier Level */
1352         case 34: /* LED Spectrum Analyzer */
1353         case 36: /* Set Squelch */
1354         case 42: /* BTLE Sniffing */
1355         case 48: /* Set CRC Verify */
1356         case 53: /* Read Register */
1357
1358             switch (command) {
1359             case 1: /* Rx Symbols */
1360             case 42: /* BTLE Sniffing */
1361                 proto_tree_add_item(main_tree, hf_rx_packets, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1362                 col_append_fstr(pinfo->cinfo, COL_INFO, " - Rx Packets: %u", tvb_get_letohs(tvb, offset));
1363                 offset += 2;
1364
1365                 break;
1366             case 4: /* Set User LED */
1367                 proto_tree_add_item(main_tree, hf_user_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1368                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1369                 offset += 2;
1370
1371                 break;
1372             case 6: /* Set Rx LED */
1373                 proto_tree_add_item(main_tree, hf_rx_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1374                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1375                 offset += 2;
1376
1377                 break;
1378             case 8: /* Set Tx LED */
1379                 proto_tree_add_item(main_tree, hf_tx_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1380                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1381                 offset += 2;
1382
1383                 break;
1384             case 10: /* Set 1V8 */
1385                 proto_tree_add_item(main_tree, hf_1v8_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1386                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1387                 offset += 2;
1388
1389                 break;
1390             case 12: /* Set Channel */
1391                 proto_tree_add_item(main_tree, hf_channel, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1392                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u MHz", tvb_get_letohs(tvb, offset));
1393                 offset += 2;
1394
1395                 break;
1396             case 17: /* Set PAEN */
1397                 proto_tree_add_item(main_tree, hf_paen, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1398                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1399                 offset += 2;
1400
1401                 break;
1402             case 19: /* Set HGM */
1403                 proto_tree_add_item(main_tree, hf_hgm, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1404                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1405                 offset += 2;
1406
1407                 break;
1408             case 23: /* Set Modulation */
1409                 proto_tree_add_item(main_tree, hf_modulation, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1410                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &modulation_vals_ext, "Unknown"));
1411                 offset += 2;
1412
1413                 break;
1414             case 29: /* Set Power Amplifier Level */
1415                 proto_tree_add_item(main_tree, hf_power_amplifier_reserved, tvb, offset, 1, ENC_NA);
1416                 proto_tree_add_item(main_tree, hf_power_amplifier_level, tvb, offset, 1, ENC_NA);
1417                 col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_letohs(tvb, offset) & 0x7);
1418                 offset += 1;
1419
1420                 proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 1, ENC_NA);
1421                 offset += 1;
1422
1423                 break;
1424             case 34: /* LED Spectrum Analyzer */
1425                 proto_tree_add_int(main_tree, hf_rssi_threshold, tvb, offset, 2, (gint8) tvb_get_letohs(tvb, offset));
1426                 col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", (gint8) tvb_get_letohs(tvb, offset));
1427                 offset += 2;
1428
1429                 break;
1430             case 36: /* Set Squelch */
1431                 proto_tree_add_item(main_tree, hf_squelch, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1432                 col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", (gint16) tvb_get_letohs(tvb, offset));
1433                 offset += 2;
1434
1435                 break;
1436             case 48: /* Set CRC Verify */
1437                 proto_tree_add_item(main_tree, hf_crc_verify, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1438                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1439                 offset += 2;
1440
1441                 break;
1442             case 53: /* Read Register */
1443                 sub_item = proto_tree_add_item(main_tree, hf_register, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1444                 register_id = tvb_get_letohs(tvb, offset);
1445                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s",
1446                         val_to_str_ext_const(register_id, &register_vals_ext, "Unknown"));
1447                 if (try_val_to_str_ext(register_id, &register_vals_ext))
1448                     proto_item_append_text(sub_item, " [%s]", val_to_str_ext_const(register_id, &register_description_vals_ext, "Unknown"));
1449                 offset += 2;
1450
1451                 break;
1452             default:
1453                 proto_tree_add_item(main_tree, hf_argument_0, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1454                 offset += 2;
1455             }
1456
1457             proto_tree_add_item(main_tree, hf_argument_1, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1458             offset += 2;
1459
1460             break;
1461         case 27: /* Spectrum Analyzer */
1462             proto_tree_add_item(main_tree, hf_low_frequency, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1463             offset += 2;
1464
1465             proto_tree_add_item(main_tree, hf_high_frequency, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1466             offset += 2;
1467
1468             col_append_fstr(pinfo->cinfo, COL_INFO, " - %u-%u MHz", tvb_get_letohs(tvb, offset - 4), tvb_get_letohs(tvb, offset - 2));
1469
1470             break;
1471 /* Group of commands with parameters by "data" but no "setup"*/
1472         case 38: /* Set BDADDR */
1473         case 39: /* Start Hopping */
1474         case 40: /* Set Clock */
1475         case 44: /* Set Access Address */
1476         case 51: /* Set AFH Map */
1477         case 54: /* BTLE Slave */
1478 /* Group of commands without any parameters */
1479         case 0: /* Ping */
1480         case 2: /* Tx Symbols */ /* NOTE: This one seems to be not implemented in firmware at all*/
1481         case 3: /* Get User LED */
1482         case 5: /* Get Rx LED */
1483         case 7: /* Get Tx LED */
1484         case 9: /* Get 1V8 */
1485         case 11: /* Get Channel */
1486         case 13: /* Reset */
1487         case 14: /* Get Microcontroller Serial Number */
1488         case 15: /* Get Microcontroller Part Number */
1489         case 16: /* Get PAEN */
1490         case 18: /* Get HGM */
1491         case 20: /* Tx Test */
1492         case 21: /* Stop */
1493         case 22: /* Get Modulation */
1494         case 24: /* Set ISP */
1495         case 25: /* Flash */
1496         case 26: /* Bootloader Flash */ /* NOTE: This one seems to be not implemented in firmware at all*/
1497         case 28: /* Get Power Amplifier Level */
1498         case 30: /* Repeater */
1499         case 31: /* Range Test */
1500         case 32: /* Range Check */
1501         case 33: /* Get Firmware Revision Number */
1502         case 35: /* Get Hardware Board ID */
1503         case 37: /* Get Squelch */
1504         case 41: /* Get Clock */
1505         case 43: /* Get Access Address */
1506         case 45: /* Do Something */
1507         case 46: /* Do Something Reply */
1508         case 47: /* Get CRC Verify */
1509         case 49: /* Poll */
1510         case 50: /* BTLE Promiscuous Mode */
1511         case 52: /* Clear AFH Map */
1512         case 55: /* Get Compile Info */
1513         default:
1514             proto_tree_add_item(main_tree, hf_argument_0, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1515             offset += 2;
1516
1517             proto_tree_add_item(main_tree, hf_argument_1, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1518             offset += 2;
1519         }
1520
1521         proto_tree_add_item(main_tree, hf_estimated_length, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1522         offset += 2;
1523
1524
1525         switch (command) {
1526             case 38: /* Set BDADDR */
1527             case 54: /* BTLE Slave */
1528             case 56: /* BTLE Set Target */
1529                 proto_tree_add_item(main_tree, hf_bdaddr, tvb, offset, 6, ENC_NA);
1530                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s",
1531                         get_ether_name((char *) tvb_memdup(wmem_packet_scope(), tvb, offset, 6)));
1532
1533                 offset += 6;
1534                 break;
1535             case 39: /* Start Hopping */
1536                 proto_tree_add_item(main_tree, hf_clock_offset, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1537                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u", tvb_get_letohl(tvb, offset));
1538
1539                 offset += 4;
1540                 break;
1541             case 40: /* Set Clock */
1542                 proto_tree_add_item(main_tree, hf_clock_100ns, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1543                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u", tvb_get_letohl(tvb, offset));
1544
1545                 offset += 4;
1546                 break;
1547             case 44: /* Set Access Address */
1548                 proto_tree_add_item(main_tree, hf_access_address, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1549                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %08x", tvb_get_letohl(tvb, offset));
1550
1551                 offset += 4;
1552                 break;
1553             case 51: /* Set AFH Map */
1554                 proto_tree_add_item(main_tree, hf_afh_map, tvb, offset, 10, ENC_NA);
1555                 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", tvb_bytes_to_ep_str(tvb, offset, 10));
1556
1557                 offset += 10;
1558                 break;
1559         }
1560
1561         if (tvb_length_remaining(tvb, offset) > 0) {
1562             proto_tree_add_expert(main_tree, pinfo, &ei_unexpected_data, tvb, offset, tvb_length_remaining(tvb, offset));
1563             offset = tvb_length(tvb);
1564         }
1565
1566         /* Save request info (command_data) */
1567         if (!pinfo->fd->flags.visited && command != 21) {
1568             key[2].length = 1;
1569             key[2].key = &k_frame_number;
1570             key[3].length = 0;
1571             key[3].key = NULL;
1572
1573             command_data = wmem_new(wmem_file_scope(), command_data_t);
1574             command_data->bus_id = bus_id;
1575             command_data->device_address = device_address;
1576
1577             command_data->command = command;
1578             command_data->command_frame_number = pinfo->fd->num;
1579             command_data->register_id = register_id;
1580
1581             wmem_tree_insert32_array(command_info, key, command_data);
1582         }
1583
1584         pinfo->p2p_dir = p2p_dir_save;
1585
1586         return offset;
1587     }
1588
1589     /* Get request info (command_data) */
1590     key[2].length = 0;
1591     key[2].key = NULL;
1592
1593     wmem_tree = (wmem_tree_t *) wmem_tree_lookup32_array(command_info, key);
1594    if (wmem_tree) {
1595         command_data = (command_data_t *) wmem_tree_lookup32_le(wmem_tree, pinfo->fd->num);
1596         if (command_data) {
1597             command_response = command_data->command;
1598             register_id = command_data->register_id;
1599         }
1600    }
1601
1602     if (!command_data) {
1603         col_append_str(pinfo->cinfo, COL_INFO, "Response: Unknown");
1604
1605         proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, tvb_length_remaining(tvb, offset));
1606
1607         pinfo->p2p_dir = p2p_dir_save;
1608
1609         return tvb_length(tvb);
1610     }
1611
1612     col_append_fstr(pinfo->cinfo, COL_INFO, "Response: %s",
1613             val_to_str_ext_const(command_response, &command_vals_ext, "Unknown"));
1614
1615     command_item = proto_tree_add_uint(main_tree, hf_response, tvb, offset, 0, command_response);
1616     command_tree = proto_item_add_subtree(command_item, ett_command);
1617     PROTO_ITEM_SET_GENERATED(command_item);
1618     switch (command_response) {
1619
1620     case 1: /* Rx Symbols */
1621     case 27: /* Spectrum Analyzer */
1622         if (usb_conv_info->transfer_type == URB_BULK) {
1623
1624             while (tvb_length_remaining(tvb, offset) > 0) {
1625                 offset = dissect_usb_rx_packet(tree, main_tree, pinfo, tvb, offset, command_response);
1626             }
1627             break;
1628         }
1629     case 0: /* Ping */
1630     case 2: /* Tx Symbols */        /* NOTE: This one seems to be not implemented in firmware at all*/
1631     case 26: /* Bootloader Flash */ /* NOTE: This one seems to be not implemented in firmware at all*/
1632     case 4: /* Set User LED */
1633     case 6: /* Set Rx LED */
1634     case 8: /* Set Tx LED */
1635     case 10: /* Set 1V8 */
1636     case 12: /* Set Channel */
1637     case 13: /* Reset */
1638     case 17: /* Set PAEN */
1639     case 19: /* Set HGM */
1640     case 20: /* Tx Test */
1641     case 21: /* Stop */
1642     case 29: /* Set Power Amplifier Level */
1643     case 30: /* Repeater */
1644     case 31: /* Range Test */
1645     case 23: /* Set Modulation */
1646     case 24: /* Set ISP */
1647     case 25: /* Flash */
1648     case 34: /* LED Spectrum Analyzer */
1649     case 36: /* Set Squelch */
1650     case 38: /* Set BDADDR */
1651     case 39: /* Start Hopping */
1652     case 40: /* Set Clock */
1653     case 42: /* BTLE Sniffing */
1654     case 44: /* Set Access Address */
1655     case 45: /* Do Something */
1656     case 48: /* Set CRC Verify */
1657     case 50: /* BTLE Promiscuous Mode */
1658     case 51: /* Set AFH Map */
1659     case 52: /* Clear AFH Map */
1660     case 54: /* BTLE Slave */
1661     case 56: /* BTLE Set Target */
1662         proto_tree_add_expert(command_tree, pinfo, &ei_unexpected_response, tvb, offset, 0);
1663         if (tvb_length_remaining(tvb, offset) > 0) {
1664             proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, -1);
1665             offset = tvb_length(tvb);
1666         }
1667         break;
1668     case 3: /* Get User LED */
1669         proto_tree_add_item(main_tree, hf_user_led, tvb, offset, 1, ENC_NA);
1670         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1671         offset += 1;
1672
1673         break;
1674     case 5: /* Get Rx LED */
1675         proto_tree_add_item(main_tree, hf_rx_led, tvb, offset, 1, ENC_NA);
1676         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1677         offset += 1;
1678
1679         break;
1680     case 7: /* Get Tx LED */
1681         proto_tree_add_item(main_tree, hf_tx_led, tvb, offset, 1, ENC_NA);
1682         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1683         offset += 1;
1684
1685         break;
1686     case 9: /* Get 1V8 */
1687         proto_tree_add_item(main_tree, hf_1v8_led, tvb, offset, 1, ENC_NA);
1688         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1689         offset += 1;
1690
1691         break;
1692     case 11: /* Get Channel */
1693         proto_tree_add_item(main_tree, hf_channel, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1694         col_append_fstr(pinfo->cinfo, COL_INFO, " = %u MHz", tvb_get_letohs(tvb, offset));
1695         offset += 2;
1696
1697         break;
1698     case 14: /* Get Microcontroller Serial Number */
1699         proto_tree_add_item(main_tree, hf_status, tvb, offset, 1, ENC_NA);
1700         status = tvb_get_guint8(tvb, offset);
1701         offset += 1;
1702
1703         if (status) break;
1704
1705         serial = (guint32 *) wmem_alloc(wmem_packet_scope(), 16);
1706         serial[0] = tvb_get_ntohl(tvb, offset);
1707         serial[1] = tvb_get_ntohl(tvb, offset + 4);
1708         serial[2] = tvb_get_ntohl(tvb, offset + 8);
1709         serial[3] = tvb_get_ntohl(tvb, offset + 12);
1710
1711         proto_tree_add_bytes(main_tree, hf_serial_number, tvb,
1712                 offset, 16, (guint8 *) serial);
1713         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s",
1714                 bytes_to_ep_str((guint8 *) serial, 16));
1715         offset += 16;
1716
1717         break;
1718     case 15: /* Get Microcontroller Part Number */
1719         proto_tree_add_item(main_tree, hf_status, tvb, offset, 1, ENC_NA);
1720         status = tvb_get_guint8(tvb, offset);
1721         offset += 1;
1722
1723         if (status) break;
1724
1725         proto_tree_add_item(main_tree, hf_part_number, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1726         col_append_fstr(pinfo->cinfo, COL_INFO, " = %08X", tvb_get_letohl(tvb, offset));
1727         offset += 4;
1728
1729         break;
1730     case 16: /* Get PAEN */
1731         proto_tree_add_item(main_tree, hf_paen, tvb, offset, 1, ENC_NA);
1732         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1733         offset += 1;
1734
1735         break;
1736     case 18: /* Get HGM */
1737         proto_tree_add_item(main_tree, hf_hgm, tvb, offset, 1, ENC_NA);
1738         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1739         offset += 1;
1740
1741         break;
1742     case 22: /* Get Modulation */
1743         proto_tree_add_item(main_tree, hf_modulation, tvb, offset, 1, ENC_NA);
1744         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &modulation_vals_ext, "Unknown"));
1745         offset += 1;
1746
1747         break;
1748     case 28: /* Get Power Amplifier Level */
1749         proto_tree_add_item(main_tree, hf_power_amplifier_reserved, tvb, offset, 1, ENC_NA);
1750         proto_tree_add_item(main_tree, hf_power_amplifier_level, tvb, offset, 1, ENC_NA);
1751         col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_guint8(tvb, offset) & 0x7);
1752         offset += 1;
1753
1754         break;
1755     case 32: /* Range Check */
1756         proto_tree_add_item(main_tree, hf_range_test_valid, tvb, offset, 1, ENC_NA);
1757         offset += 1;
1758
1759         proto_tree_add_item(main_tree, hf_range_test_request_power_amplifier, tvb, offset, 1, ENC_NA);
1760         offset += 1;
1761
1762         proto_tree_add_item(main_tree, hf_range_test_request_number, tvb, offset, 1, ENC_NA);
1763         offset += 1;
1764
1765         proto_tree_add_item(main_tree, hf_range_test_reply_power_amplifier, tvb, offset, 1, ENC_NA);
1766         offset += 1;
1767
1768         proto_tree_add_item(main_tree, hf_range_test_reply_number, tvb, offset, 1, ENC_NA);
1769         offset += 1;
1770
1771         break;
1772     case 33: /* Get Firmware Revision Number */
1773         proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1774         offset += 2;
1775
1776         proto_tree_add_item(main_tree, hf_length, tvb, offset, 1, ENC_NA);
1777         length = tvb_get_guint8(tvb, offset);
1778         offset += 1;
1779
1780         proto_tree_add_item(main_tree, hf_firmware_revision, tvb, offset, length, ENC_NA | ENC_ASCII);
1781         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", tvb_get_string_enc(wmem_packet_scope(), tvb, offset, length, ENC_ASCII));
1782         offset += length;
1783
1784         break;
1785     case 35: /* Get Hardware Board ID */
1786         proto_tree_add_item(main_tree, hf_board_id, tvb, offset, 1, ENC_NA);
1787         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &board_id_vals_ext, "Unknown"));
1788         offset += 1;
1789
1790         break;
1791     case 37: /* Get Squelch */
1792         proto_tree_add_item(main_tree, hf_squelch, tvb, offset, 1, ENC_NA);
1793         col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", (gint8) tvb_get_guint8(tvb, offset));
1794         offset += 1;
1795
1796         break;
1797     case 41: /* Get Clock */
1798         proto_tree_add_item(main_tree, hf_clock_ns, tvb, offset, 1, ENC_NA);
1799         col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_guint8(tvb, offset));
1800         offset += 1;
1801
1802         break;
1803     case 43: /* Get Access Address */
1804         proto_tree_add_item(main_tree, hf_access_address, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1805         col_append_fstr(pinfo->cinfo, COL_INFO, " = %08x", tvb_get_letohl(tvb, offset));
1806         offset += 4;
1807
1808         break;
1809     case 46: /* Do Something Reply */
1810             proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1811             offset += 2;
1812
1813         break;
1814     case 47: /* Get CRC Verify */
1815         proto_tree_add_item(main_tree, hf_crc_verify, tvb, offset, 1, ENC_NA);
1816         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1817         offset += 1;
1818
1819         break;
1820     case 49: /* Poll */
1821         if (tvb_length_remaining(tvb, offset) == 1) {
1822             proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 1, ENC_NA);
1823             offset += 1;
1824             break;
1825         }
1826
1827         offset = dissect_usb_rx_packet(tree, main_tree, pinfo, tvb, offset, command_response);
1828
1829         break;
1830     case 53: /* Read Register */
1831         sub_item = proto_tree_add_uint(main_tree, hf_register, tvb, offset, 0, register_id);
1832         PROTO_ITEM_SET_GENERATED(sub_item);
1833         if (try_val_to_str_ext(register_id, &register_vals_ext))
1834             proto_item_append_text(sub_item, " [%s]", val_to_str_ext_const(register_id, &register_description_vals_ext, "Unknown"));
1835
1836
1837         sub_item = proto_tree_add_item(main_tree, hf_register_value, tvb, offset, 2, ENC_BIG_ENDIAN);
1838         sub_tree = proto_item_add_subtree(sub_item, ett_register_value);
1839         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s:  0x%04x",
1840                 val_to_str_ext_const(register_id, &register_vals_ext, "Unknown"),
1841                 tvb_get_ntohs(tvb, offset));
1842
1843         dissect_cc2400_register(sub_tree, tvb, offset, register_id);
1844         offset += 2;
1845
1846         break;
1847     case 55: /* Get Compile Info */
1848         proto_tree_add_item(main_tree, hf_length, tvb, offset, 1, ENC_NA);
1849         length = tvb_get_guint8(tvb, offset);
1850         offset += 1;
1851
1852         proto_tree_add_item(main_tree, hf_firmware_compile_info, tvb, offset, length, ENC_NA | ENC_ASCII);
1853         col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", tvb_get_string_enc(wmem_packet_scope(), tvb, offset, length, ENC_ASCII));
1854         offset += length;
1855
1856         break;
1857     }
1858
1859     if (tvb_length_remaining(tvb, offset) > 0) {
1860         proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, -1);
1861         offset = tvb_length(tvb);
1862     }
1863
1864     pinfo->p2p_dir = p2p_dir_save;
1865
1866     return offset;
1867 }
1868
1869 void
1870 proto_register_ubertooth(void)
1871 {
1872     module_t         *module;
1873     expert_module_t  *expert_module;
1874
1875     static hf_register_info hf[] = {
1876         { &hf_command,
1877             { "Command",                         "ubertooth.command",
1878             FT_UINT8, BASE_DEC | BASE_EXT_STRING, &command_vals_ext, 0x00,
1879             NULL, HFILL }
1880         },
1881         { &hf_response,
1882             { "Response",                        "ubertooth.response",
1883             FT_UINT8, BASE_DEC | BASE_EXT_STRING, &command_vals_ext, 0x00,
1884             NULL, HFILL }
1885         },
1886         { &hf_argument_0,
1887             { "Unused Argument 0",               "ubertooth.argument.0",
1888             FT_UINT16, BASE_HEX, NULL, 0x00,
1889             NULL, HFILL }
1890         },
1891         { &hf_argument_1,
1892             { "Unused Argument 1",               "ubertooth.argument.1",
1893             FT_UINT16, BASE_HEX, NULL, 0x00,
1894             NULL, HFILL }
1895         },
1896         { &hf_estimated_length,
1897             { "Estimated Length",                "ubertooth.estimated_length",
1898             FT_UINT16, BASE_DEC, NULL, 0x00,
1899             NULL, HFILL }
1900         },
1901         { &hf_board_id,
1902             { "Board ID",                        "ubertooth.board_id",
1903             FT_UINT8, BASE_HEX | BASE_EXT_STRING, &board_id_vals_ext, 0x00,
1904             NULL, HFILL }
1905         },
1906         { &hf_reserved,
1907             { "Reserved",                        "ubertooth.reserved",
1908             FT_BYTES, BASE_NONE, NULL, 0x00,
1909             NULL, HFILL }
1910         },
1911         { &hf_length,
1912             { "Length",                          "ubertooth.length",
1913             FT_UINT8, BASE_DEC, NULL, 0x00,
1914             NULL, HFILL }
1915         },
1916         { &hf_firmware_revision,
1917             { "Firmware Revision",               "ubertooth.firmware.reversion",
1918             FT_STRING, BASE_NONE, NULL, 0x00,
1919             NULL, HFILL }
1920         },
1921         { &hf_firmware_compile_info,
1922             { "Firmware Compile Info",           "ubertooth.firmware.compile_info",
1923             FT_STRING, BASE_NONE, NULL, 0x00,
1924             NULL, HFILL }
1925         },
1926         { &hf_user_led,
1927             { "User LED State",                  "ubertooth.user_led",
1928             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
1929             NULL, HFILL }
1930         },
1931         { &hf_rx_led,
1932             { "Rx LED State",                    "ubertooth.rx_led",
1933             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
1934             NULL, HFILL }
1935         },
1936         { &hf_tx_led,
1937             { "Tx LED State",                    "ubertooth.tx_led",
1938             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
1939             NULL, HFILL }
1940         },
1941         { &hf_1v8_led,
1942             { "1V8 LED State",                   "ubertooth.1v8_led",
1943             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
1944             NULL, HFILL }
1945         },
1946         { &hf_channel,
1947             { "Channel",                         "ubertooth.channel",
1948             FT_UINT16, BASE_DEC, NULL, 0x00,
1949             NULL, HFILL }
1950         },
1951         { &hf_usb_rx_packet_channel,
1952             { "Channel",                         "ubertooth.usb_rx_packet.channel",
1953             FT_UINT8, BASE_DEC, NULL, 0x00,
1954             NULL, HFILL }
1955         },
1956         { &hf_serial_number,
1957             { "Serial Number",                   "ubertooth.serial_number",
1958             FT_BYTES, BASE_NONE, NULL, 0x00,
1959             NULL, HFILL }
1960         },
1961         { &hf_status,
1962             { "Status",                          "ubertooth.status",
1963             FT_UINT8, BASE_HEX, NULL, 0x00,
1964             NULL, HFILL }
1965         },
1966         { &hf_part_number,
1967             { "Part Number",                     "ubertooth.part_number",
1968             FT_UINT32, BASE_HEX, NULL, 0x00,
1969             NULL, HFILL }
1970         },
1971         { &hf_packet_type,
1972             { "Packet Type",                     "ubertooth.packet_type",
1973             FT_UINT8, BASE_HEX | BASE_EXT_STRING, &packet_type_vals_ext, 0x00,
1974             NULL, HFILL }
1975         },
1976         { &hf_chip_status_reserved,
1977             { "Reserved",                        "ubertooth.status.resered",
1978             FT_BOOLEAN, 8, NULL, 0xE0,
1979             NULL, HFILL }
1980         },
1981         { &hf_chip_status_rssi_trigger,
1982             { "RSSI Trigger",                    "ubertooth.status.rssi_trigger",
1983             FT_BOOLEAN, 8, NULL, 0x10,
1984             NULL, HFILL }
1985         },
1986         { &hf_chip_status_cs_trigger,
1987             { "CS Trigger",                      "ubertooth.status.cs_trigger",
1988             FT_BOOLEAN, 8, NULL, 0x08,
1989             NULL, HFILL }
1990         },
1991         { &hf_chip_status_fifo_overflow,
1992             { "FIFO Overflow",                   "ubertooth.status.fifo_overflow",
1993             FT_BOOLEAN, 8, NULL, 0x04,
1994             NULL, HFILL }
1995         },
1996         { &hf_chip_status_dma_error,
1997             { "DMA Error",                       "ubertooth.status.dma_error",
1998             FT_BOOLEAN, 8, NULL, 0x02,
1999             NULL, HFILL }
2000         },
2001         { &hf_chip_status_dma_overflow,
2002             { "DMA Overflow",                    "ubertooth.status.dma_overflow",
2003             FT_BOOLEAN, 8, NULL, 0x01,
2004             NULL, HFILL }
2005         },
2006         { &hf_clock_ns,
2007             { "Clock 1ns",                      "ubertooth.clock_ns",
2008             FT_UINT8, BASE_DEC, NULL, 0x00,
2009             NULL, HFILL }
2010         },
2011         { &hf_clock_100ns,
2012             { "Clock 100ns",                    "ubertooth.clock_100ns",
2013             FT_UINT32, BASE_DEC, NULL, 0x00,
2014             NULL, HFILL }
2015         },
2016         { &hf_rssi_min,
2017             { "RSSI Min",                        "ubertooth.rssi_min",
2018             FT_INT8, BASE_DEC, NULL, 0x00,
2019             NULL, HFILL }
2020         },
2021         { &hf_rssi_max,
2022             { "RSSI Max",                        "ubertooth.rssi_max",
2023             FT_INT8, BASE_DEC, NULL, 0x00,
2024             NULL, HFILL }
2025         },
2026         { &hf_rssi_avg,
2027             { "RSSI Avg",                        "ubertooth.rssi_avg",
2028             FT_INT8, BASE_DEC, NULL, 0x00,
2029             NULL, HFILL }
2030         },
2031         { &hf_rssi_count,
2032             { "RSSI Count",                      "ubertooth.rssi_count",
2033             FT_UINT8, BASE_DEC, NULL, 0x00,
2034             NULL, HFILL }
2035         },
2036         { &hf_paen,
2037             { "PAEN",                            "ubertooth.paen",
2038             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2039             NULL, HFILL }
2040         },
2041         { &hf_hgm,
2042             { "HGM",                             "ubertooth.hgm",
2043             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2044             NULL, HFILL }
2045         },
2046         { &hf_crc_verify,
2047             { "CRC Verify",                      "ubertooth.crc_verify",
2048             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2049             NULL, HFILL }
2050         },
2051         { &hf_modulation,
2052             { "Modulation",                      "ubertooth.modulation",
2053             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &modulation_vals_ext, 0x00,
2054             NULL, HFILL }
2055         },
2056         { &hf_power_amplifier_reserved,
2057             { "Reserved",                        "ubertooth.power_amplifier.reserved",
2058             FT_UINT8, BASE_HEX, NULL, 0xF8,
2059             NULL, HFILL }
2060         },
2061         { &hf_power_amplifier_level,
2062             { "Level",                           "ubertooth.power_amplifier.level",
2063             FT_UINT8, BASE_DEC, NULL, 0x07,
2064             NULL, HFILL }
2065         },
2066         { &hf_range_test_valid,
2067             { "Valid",                           "ubertooth.range_test.valid",
2068             FT_UINT8, BASE_DEC, NULL, 0x00,
2069             NULL, HFILL }
2070         },
2071         { &hf_range_test_request_power_amplifier,
2072             { "Request Power Amplifier",         "ubertooth.range_test.request_power_amplifier",
2073             FT_UINT8, BASE_DEC, NULL, 0x00,
2074             NULL, HFILL }
2075         },
2076         { &hf_range_test_request_number,
2077             { "Request Power Amplifier",         "ubertooth.range_test.request_number",
2078             FT_UINT8, BASE_DEC, NULL, 0x00,
2079             NULL, HFILL }
2080         },
2081         { &hf_range_test_reply_power_amplifier,
2082             { "Request Power Amplifier",         "ubertooth.range_test.reply_power_amplifier",
2083             FT_UINT8, BASE_DEC, NULL, 0x00,
2084             NULL, HFILL }
2085         },
2086         { &hf_range_test_reply_number,
2087             { "Reply Power Amplifier",           "ubertooth.range_test.reply_number",
2088             FT_UINT8, BASE_DEC, NULL, 0x00,
2089             NULL, HFILL }
2090         },
2091         { &hf_squelch,
2092             { "Squelch",                         "ubertooth.squelch",
2093             FT_INT16, BASE_DEC, NULL, 0x00,
2094             NULL, HFILL }
2095         },
2096         { &hf_access_address,
2097             { "Access Address",                  "ubertooth.access_address",
2098             FT_UINT32, BASE_HEX, NULL, 0x00,
2099             NULL, HFILL }
2100         },
2101         { &hf_register,
2102             { "Register",                        "ubertooth.register",
2103             FT_UINT16, BASE_HEX | BASE_EXT_STRING, &register_vals_ext, 0x00,
2104             NULL, HFILL }
2105         },
2106         { &hf_register_value,
2107             { "Register Value",                  "ubertooth.register.value",
2108             FT_UINT16, BASE_HEX, NULL, 0x00,
2109             NULL, HFILL }
2110         },
2111         { &hf_low_frequency,
2112             { "Low Frequency",                   "ubertooth.low_frequency",
2113             FT_UINT16, BASE_DEC, NULL, 0x00,
2114             NULL, HFILL }
2115         },
2116         { &hf_high_frequency,
2117             { "High Frequency",                  "ubertooth.high_frequency",
2118             FT_UINT16, BASE_DEC, NULL, 0x00,
2119             NULL, HFILL }
2120         },
2121         { &hf_rx_packets,
2122             { "Rx Packets",                      "ubertooth.rx_packets",
2123             FT_UINT16, BASE_DEC, NULL, 0x00,
2124             NULL, HFILL }
2125         },
2126         { &hf_rssi_threshold,
2127             { "RSSI Threshold",                  "ubertooth.rssi_threshold",
2128             FT_INT16, BASE_DEC, NULL, 0x00,
2129             NULL, HFILL }
2130         },
2131         { &hf_clock_offset,
2132             { "Clock Offset",                    "ubertooth.clock_offset",
2133             FT_UINT32, BASE_DEC, NULL, 0x00,
2134             NULL, HFILL }
2135         },
2136         { &hf_afh_map,
2137             { "AFH Map",                         "ubertooth.afh_map",
2138             FT_BYTES, BASE_NONE, NULL, 0x00,
2139             NULL, HFILL }
2140         },
2141         { &hf_bdaddr,
2142           { "BD_ADDR",                           "ubertooth.bd_addr",
2143             FT_ETHER, BASE_NONE, NULL, 0x0,
2144             "Bluetooth Device Address", HFILL}
2145         },
2146         { &hf_usb_rx_packet,
2147             { "USB Rx Packet",                   "ubertooth.usb_rx_packet",
2148             FT_NONE, BASE_NONE, NULL, 0x00,
2149             NULL, HFILL }
2150         },
2151         { &hf_spectrum_entry,
2152             { "Spectrum Entry",                  "ubertooth.spectrum_entry",
2153             FT_NONE, BASE_NONE, NULL, 0x00,
2154             NULL, HFILL }
2155         },
2156         { &hf_frequency,
2157             { "Frequency",                       "ubertooth.spectrum_entry.frequency",
2158             FT_UINT16, BASE_DEC, NULL, 0x00,
2159             NULL, HFILL }
2160         },
2161         { &hf_rssi,
2162             { "RSSI",                            "ubertooth.spectrum_entry.rssi",
2163             FT_INT8, BASE_DEC, NULL, 0x00,
2164             NULL, HFILL }
2165         },
2166         { &hf_data,
2167             { "Data",                            "ubertooth.data",
2168             FT_NONE, BASE_NONE, NULL, 0x00,
2169             NULL, HFILL }
2170         },
2171         { &hf_cc2400_value,
2172             { "Value",                           "ubertooth.register.value",
2173             FT_UINT16, BASE_HEX_DEC, NULL, 0xFFFF,
2174             NULL, HFILL }
2175         },
2176         { &hf_cc2400_syncl,
2177             { "Synchronisation Word, lower 16 bit",        "ubertooth.register.value.syncl",
2178             FT_UINT16, BASE_HEX, NULL, 0x00,
2179             NULL, HFILL }
2180         },
2181         { &hf_cc2400_synch,
2182             { "Synchronisation Word, upper 16 bit",        "ubertooth.register.value.synch",
2183             FT_UINT16, BASE_HEX, NULL, 0x00,
2184             NULL, HFILL }
2185         },
2186         { &hf_cc2400_reserved_0x2B_res_15_14,
2187             { "Reserved [15:14]",                          "ubertooth.register.value.reserved.0x2B.15_14",
2188             FT_UINT16, BASE_DEC, NULL, 0xC000,
2189             NULL, HFILL }
2190         },
2191         { &hf_cc2400_reserved_0x2B_res_13,
2192             { "Reserved [13]",                             "ubertooth.register.value.reserved.0x2B.13",
2193             FT_BOOLEAN, 16, NULL, 0x2000,
2194             NULL, HFILL }
2195         },
2196         { &hf_cc2400_reserved_0x2B_res_12,
2197             { "Reserved [12]",                             "ubertooth.register.value.reserved.0x2B.12",
2198             FT_BOOLEAN, 16, NULL, 0x1000,
2199             NULL, HFILL }
2200         },
2201         { &hf_cc2400_reserved_0x2B_res_11_0,
2202             { "Reserved [11:0]",                           "ubertooth.register.value.reserved.0x2B.11_0",
2203             FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2204             NULL, HFILL }
2205         },
2206         { &hf_cc2400_reserved_0x2A_res_15_11,
2207             { "Reserved [15:11]",                          "ubertooth.register.value.reserved.0x2A.15_11",
2208             FT_UINT16, BASE_DEC, NULL, 0xF800,
2209             NULL, HFILL }
2210         },
2211         { &hf_cc2400_reserved_0x2A_res_10,
2212             { "Reserved [10]",                             "ubertooth.register.value.reserved.0x2A.10",
2213             FT_BOOLEAN, 16, NULL, 0x0400,
2214             NULL, HFILL }
2215         },
2216         { &hf_cc2400_reserved_0x2A_res_9_0,
2217             { "Reserved [9:0]",                            "ubertooth.register.value.reserved.0x2A.9_0",
2218             FT_UINT16, BASE_DEC, NULL, 0x03FF,
2219             NULL, HFILL }
2220         },
2221         { &hf_cc2400_reserved_0x29_res_15_8,
2222             { "Reserved [15:8]",                           "ubertooth.register.value.reserved.0x29.15_8",
2223             FT_UINT16, BASE_DEC, NULL, 0xFF00,
2224             NULL, HFILL }
2225         },
2226         { &hf_cc2400_reserved_0x29_res_7_3,
2227             { "Reserved [7:3]",                            "ubertooth.register.value.reserved.0x29.7_3",
2228             FT_UINT16, BASE_DEC, NULL, 0x00F8,
2229             NULL, HFILL }
2230         },
2231         { &hf_cc2400_reserved_0x29_res_2_0,
2232             { "Reserved [2:0]",                            "ubertooth.register.value.reserved.0x29.2_0",
2233             FT_UINT16, BASE_DEC, NULL, 0x0007,
2234             NULL, HFILL }
2235         },
2236         { &hf_cc2400_reserved_0x28_res_15,
2237             { "Reserved [15]",                             "ubertooth.register.value.reserved.0x28.15",
2238             FT_BOOLEAN, 16, NULL, 0x8000,
2239             NULL, HFILL }
2240         },
2241         { &hf_cc2400_reserved_0x28_res_14_13,
2242             { "Reserved [14:13]",                          "ubertooth.register.value.reserved.0x28.14_13",
2243             FT_UINT16, BASE_DEC, NULL, 0x6000,
2244             NULL, HFILL }
2245         },
2246         { &hf_cc2400_reserved_0x28_res_12_7,
2247             { "Reserved [12:7]",                           "ubertooth.register.value.reserved.0x28.12_7",
2248             FT_UINT16, BASE_DEC, NULL, 0x1F80,
2249             NULL, HFILL }
2250         },
2251         { &hf_cc2400_reserved_0x28_res_6_0,
2252             { "Reserved [6:0]",                            "ubertooth.register.value.reserved.0x28.6_0",
2253             FT_UINT16, BASE_DEC, NULL, 0x007F,
2254             NULL, HFILL }
2255         },
2256         { &hf_cc2400_reserved_0x27_res_15_8,
2257             { "Reserved [15:8]",                           "ubertooth.register.value.reserved.0x27.15_8",
2258             FT_UINT16, BASE_DEC, NULL, 0xFF00,
2259             NULL, HFILL }
2260         },
2261         { &hf_cc2400_reserved_0x27_res_7_3,
2262             { "Reserved [7:3]",                            "ubertooth.register.value.reserved.0x27.7_3",
2263             FT_UINT16, BASE_DEC, NULL, 0x00F8,
2264             NULL, HFILL }
2265         },
2266         { &hf_cc2400_reserved_0x27_res_2_0,
2267             { "Reserved [2:0]",                            "ubertooth.register.value.reserved.0x27.2_0",
2268             FT_UINT16, BASE_DEC, NULL, 0x0007,
2269             NULL, HFILL }
2270         },
2271         { &hf_cc2400_reserved_0x26_res_15_10,
2272             { "Reserved [15:10]",                          "ubertooth.register.value.reserved.0x26.15_10",
2273             FT_UINT16, BASE_DEC, NULL, 0xFC00,
2274             NULL, HFILL }
2275         },
2276         { &hf_cc2400_reserved_0x26_res_9_0,
2277             { "Reserved [9:0]",                            "ubertooth.register.value.reserved.0x26.9_0",
2278             FT_UINT16, BASE_DEC, NULL, 0x03FF,
2279             NULL, HFILL }
2280         },
2281
2282         { &hf_cc2400_reserved_0x25_res_15_12,
2283             { "Reserved [15:12]",                          "ubertooth.register.value.reserved.0x25.15_12",
2284             FT_UINT16, BASE_DEC, NULL, 0xF000,
2285             NULL, HFILL }
2286         },
2287         { &hf_cc2400_reserved_0x25_res_11_0,
2288             { "Reserved [11:0]",                            "ubertooth.register.value.reserved.0x25.11_0",
2289             FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2290             NULL, HFILL }
2291         },
2292         { &hf_cc2400_reserved_0x24_res_15_14,
2293             { "Reserved [15:14]",                          "ubertooth.register.value.reserved.0x24.15_14",
2294             FT_UINT16, BASE_DEC, NULL, 0xC000,
2295             NULL, HFILL }
2296         },
2297         { &hf_cc2400_reserved_0x24_res_13_10,
2298             { "Reserved [13:10]",                          "ubertooth.register.value.reserved.0x24.13_10",
2299             FT_UINT16, BASE_DEC, NULL, 0x3C00,
2300             NULL, HFILL }
2301         },
2302         { &hf_cc2400_reserved_0x24_res_9_7,
2303             { "Reserved [9:7]",                            "ubertooth.register.value.reserved.0x24.9_7",
2304             FT_UINT16, BASE_DEC, NULL, 0x0380,
2305             NULL, HFILL }
2306         },
2307         { &hf_cc2400_reserved_0x24_res_6_0,
2308             { "Reserved [6:0]",                            "ubertooth.register.value.reserved.0x24.6_0",
2309             FT_UINT16, BASE_DEC, NULL, 0x007F,
2310             NULL, HFILL }
2311         },
2312         { &hf_cc2400_int_reserved_15_8,
2313             { "Reserved [15:8]",                           "ubertooth.register.value.int.reserved.15_8",
2314             FT_UINT16, BASE_DEC, NULL, 0xFF00,
2315             NULL, HFILL }
2316         },
2317         { &hf_cc2400_int_reserved_7,
2318             { "Reserved [7]",                              "ubertooth.register.value.int.reserved.7",
2319             FT_BOOLEAN, 16, NULL, 0x0080,
2320             NULL, HFILL }
2321         },
2322         { &hf_cc2400_int_pkt_polarity,
2323             { "PKT Polarity",                              "ubertooth.register.value.int.pkt_polarity",
2324             FT_BOOLEAN, 16, NULL, 0x0040,
2325             NULL, HFILL }
2326         },
2327         { &hf_cc2400_int_fifo_polarity,
2328             { "FIFO Polarity",                             "ubertooth.register.value.int.fifo_polarity",
2329             FT_BOOLEAN, 16, NULL, 0x0020,
2330             NULL, HFILL }
2331         },
2332         { &hf_cc2400_int_fifo_threshold,
2333             { "FIFO Threshold",                            "ubertooth.register.value.int.fifo_threshold",
2334             FT_UINT16, BASE_DEC, NULL, 0x001F,
2335             NULL, HFILL }
2336         },
2337         { &hf_cc2400_main_resetn,
2338             { "Reset N",                                   "ubertooth.register.value.main.resetn",
2339             FT_BOOLEAN, 16, NULL, 0x8000,
2340             NULL, HFILL }
2341         },
2342         { &hf_cc2400_main_reserved_14_10,
2343             { "Reserved [14:10]",                          "ubertooth.register.value.main.reserved.14_10",
2344             FT_UINT16, BASE_DEC, NULL, 0x7C00,
2345             NULL, HFILL }
2346         },
2347         { &hf_cc2400_main_fs_force_en,
2348             { "Forces Frequency Synthesiser",              "ubertooth.register.value.main.fs_force_en",
2349             FT_BOOLEAN, 16, NULL, 0x0200,
2350             NULL, HFILL }
2351         },
2352         { &hf_cc2400_main_rxn_tx,
2353             { "RxN Tx",                                    "ubertooth.register.value.main.rxn_tx",
2354             FT_BOOLEAN, 16, NULL, 0x0100,
2355             NULL, HFILL }
2356         },
2357         { &hf_cc2400_main_reserved_7_4,
2358             { "Reserved [7:4]",                            "ubertooth.register.value.main.reserved.7_4",
2359             FT_UINT16, BASE_DEC, NULL, 0x00F0,
2360             NULL, HFILL }
2361         },
2362         { &hf_cc2400_main_reserved_3,
2363             { "Reserved [3]",                              "ubertooth.register.value.main.reserved.3",
2364             FT_BOOLEAN, 16, NULL, 0x0008,
2365             NULL, HFILL }
2366         },
2367         { &hf_cc2400_main_reserved_2,
2368             { "Reserved [2]",                              "ubertooth.register.value.main.reserved.2",
2369             FT_BOOLEAN, 16, NULL, 0x0004,
2370             NULL, HFILL }
2371         },
2372         { &hf_cc2400_main_xosc16m_bypass,
2373             { "Bypass 16 MHz Crystal Oscillator",          "ubertooth.register.value.main.xosc16m_bypass",
2374             FT_BOOLEAN, 16, NULL, 0x0002,
2375             NULL, HFILL }
2376         },
2377         { &hf_cc2400_main_xosc16m_en,
2378             { "Force 16 MHz Crystal Oscillator",           "ubertooth.register.value.main.xosc16m_en",
2379             FT_BOOLEAN, 16, NULL, 0x0001,
2380             NULL, HFILL }
2381         },
2382         { &hf_cc2400_fsctrl_reserved,
2383             { "Reserved [15:6]",                           "ubertooth.register.value.fsctrl.reserved.15_6",
2384             FT_UINT16, BASE_DEC, NULL, 0xFFC0,
2385             NULL, HFILL }
2386         },
2387         { &hf_cc2400_fsctrl_lock_threshold,
2388             { "Lock Threshold",                            "ubertooth.register.value.fsctrl.lock_threshold",
2389             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fsctlr_lock_threshold_vals_ext, 0x0030,
2390             NULL, HFILL }
2391         },
2392         { &hf_cc2400_fsctrl_cal_done,
2393             { "Calibration Done",                          "ubertooth.register.value.fsctrl.cal_done",
2394             FT_BOOLEAN, 16, NULL, 0x0008,
2395             NULL, HFILL }
2396         },
2397         { &hf_cc2400_fsctrl_cal_running,
2398             { "Calibration Running",                       "ubertooth.register.value.fsctrl.cal_running",
2399             FT_BOOLEAN, 16, NULL, 0x0004,
2400             NULL, HFILL }
2401         },
2402         { &hf_cc2400_fsctrl_lock_length,
2403             { "Lock Length",                               "ubertooth.register.value.fsctrl.lock_length",
2404             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fsctlr_lock_length_vals_ext, 0x0002,
2405             NULL, HFILL }
2406         },
2407         { &hf_cc2400_fsctrl_lock_status,
2408             { "PLL Lock Status",                           "ubertooth.register.value.fsctrl.lock_status",
2409             FT_BOOLEAN, 16, NULL, 0x0001,
2410             NULL, HFILL }
2411         },
2412         { &hf_cc2400_fsdiv_reserved,
2413             { "Reserved [15:12]",                          "ubertooth.register.value.fsdiv.reserved.15_12",
2414             FT_UINT16, BASE_DEC, NULL, 0xF000,
2415             NULL, HFILL }
2416         },
2417         { &hf_cc2400_fsdiv_frequency,
2418             { "Frequency",                                 "ubertooth.register.value.fsdiv.frequency",
2419             FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2420             NULL, HFILL }
2421         },
2422         { &hf_cc2400_fsdiv_freq_high,
2423             { "Frequency High Part",                       "ubertooth.register.value.fsdiv.frequency.high",
2424             FT_UINT16, BASE_DEC, NULL, 0x0C00,
2425             NULL, HFILL }
2426         },
2427         { &hf_cc2400_fsdiv_freq,
2428             { "Frequency Lower Part",                      "ubertooth.register.value.fsdiv.frequency.low",
2429             FT_UINT16, BASE_DEC, NULL, 0x03FF,
2430             NULL, HFILL }
2431         },
2432         { &hf_cc2400_mdmctrl_reserved,
2433             { "Reserved [15:13]",                          "ubertooth.register.value.mdmctrl.reserved.15_13",
2434             FT_UINT16, BASE_DEC, NULL, 0xE000,
2435             NULL, HFILL }
2436         },
2437         { &hf_cc2400_mdmctrl_mod_offset,
2438             { "Modulator Offset",                          "ubertooth.register.value.mdmctrl.mod_offset",
2439             FT_UINT16, BASE_DEC, NULL, 0x1F80,
2440             NULL, HFILL }
2441         },
2442         { &hf_cc2400_mdmctrl_mod_dev,
2443             { "Modulator Deviation",                       "ubertooth.register.value.mdmctrl.mod_dev",
2444             FT_UINT16, BASE_DEC, NULL, 0x007F,
2445             NULL, HFILL }
2446         },
2447         { &hf_cc2400_agcctrl_vga_gain,
2448             { "VGA Gain",                                  "ubertooth.register.value.agcctrl.vga_gain",
2449             FT_UINT16, BASE_HEX, NULL, 0xFF00,
2450             NULL, HFILL }
2451         },
2452         { &hf_cc2400_agcctrl_reserved,
2453             { "Reserved [7:4]",                            "ubertooth.register.value.agcctrl.reserved.7_4",
2454             FT_UINT16, BASE_DEC, NULL, 0x00F0,
2455             NULL, HFILL }
2456         },
2457         { &hf_cc2400_agcctrl_agc_locked,
2458             { "AGC Locked",                                "ubertooth.register.value.agcctrl.agc_locked",
2459             FT_BOOLEAN, 16, NULL, 0x0008,
2460             NULL, HFILL }
2461         },
2462         { &hf_cc2400_agcctrl_agc_lock,
2463             { "AGC Lock",                                  "ubertooth.register.value.agcctrl.agc_lock",
2464             FT_BOOLEAN, 16, NULL, 0x0004,
2465             NULL, HFILL }
2466         },
2467         { &hf_cc2400_agcctrl_agc_sync_lock,
2468             { "AGC Sync Lock",                             "ubertooth.register.value.agcctrl.agc_sync_lock",
2469             FT_BOOLEAN, 16, NULL, 0x0002,
2470             NULL, HFILL }
2471         },
2472         { &hf_cc2400_agcctrl_vga_gain_oe,
2473             { "VGA Gain Override Enable",                  "ubertooth.register.value.agcctrl.vga_gain_oe",
2474             FT_BOOLEAN, 16, NULL, 0x0001,
2475             NULL, HFILL }
2476         },
2477         { &hf_cc2400_frend_reserved_15_4,
2478             { "Reserved [15:4]",                           "ubertooth.register.value.frend.reserved.15_4",
2479             FT_UINT16, BASE_DEC, NULL, 0xFFF0,
2480             NULL, HFILL }
2481         },
2482         { &hf_cc2400_frend_reserved_3,
2483             { "Reserved [3]",                              "ubertooth.register.value.frend.reserved.3",
2484             FT_BOOLEAN, 16, NULL, 0x0008,
2485             NULL, HFILL }
2486         },
2487         { &hf_cc2400_frend_pa_level,
2488             { "Power Amplifier Level",                     "ubertooth.register.value.frend.pa_level",
2489             FT_UINT16, BASE_DEC, NULL, 0x0007,
2490             NULL, HFILL }
2491         },
2492         { &hf_cc2400_rssi_rssi_val,
2493             { "Avarage RSSI Value",                        "ubertooth.register.value.rssi.rssi_val",
2494             FT_INT8, BASE_DEC, NULL, 0xFF00,
2495             NULL, HFILL }
2496         },
2497         { &hf_cc2400_rssi_rssi_cs_thres,
2498             { "RSSI Carrier Sense Threshold",              "ubertooth.register.value.rssi.rssi_cs_thres",
2499             FT_INT16, BASE_DEC, NULL, 0x00FC,
2500             NULL, HFILL }
2501         },
2502         { &hf_cc2400_rssi_rssi_filt,
2503             { "RSSI Averaging Filter Length",              "ubertooth.register.value.rssi.rssi_filt",
2504             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_rssi_rssi_filt_vals_ext, 0x0003,
2505             NULL, HFILL }
2506         },
2507         { &hf_cc2400_freqest_rx_freq_offset,
2508             { "Rx Frequence Offset",                       "ubertooth.register.value.freqest.rx_freq_offset",
2509             FT_INT16, BASE_DEC, NULL, 0xFF00,
2510             NULL, HFILL }
2511         },
2512         { &hf_cc2400_freqest_reserved,
2513             { "Reserved [7:0]",                            "ubertooth.register.value.freqest.reserved.7_0",
2514             FT_UINT16, BASE_DEC, NULL, 0x00FF,
2515             NULL, HFILL }
2516         },
2517         { &hf_cc2400_iocfg_reserved,
2518             { "Reserved [15]",                             "ubertooth.register.value.iocfg.reserved.15",
2519             FT_BOOLEAN, 16, NULL, 0x8000,
2520             NULL, HFILL }
2521         },
2522         { &hf_cc2400_iocfg_gio6_cfg,
2523             { "GIO6 Configuration",                        "ubertooth.register.value.iocfg.gio6_cfg",
2524             FT_UINT16, BASE_DEC, NULL, 0x7E00,
2525             NULL, HFILL }
2526         },
2527         { &hf_cc2400_iocfg_gio1_cfg,
2528             { "GIO1 Configuration",                        "ubertooth.register.value.iocfg.gio1_cfg",
2529             FT_UINT16, BASE_DEC, NULL, 0x01F8,
2530             NULL, HFILL }
2531         },
2532         { &hf_cc2400_iocfg_hssd_src,
2533             { "High Speed Serial Data Source",             "ubertooth.register.value.iocfg.hssd_src",
2534             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_iocfg_hssd_src_vals_ext, 0x0007,
2535             NULL, HFILL }
2536         },
2537         { &hf_cc2400_fsmtc_tc_rxon2agcen,
2538             { "Rx On to AGC Enabled",                      "ubertooth.register.value.fsmtc.tc_rxon2agcen",
2539             FT_UINT16, BASE_DEC, NULL, 0xE000,
2540             NULL, HFILL }
2541         },
2542         { &hf_cc2400_fsmtc_tc_paon2switch,
2543             { "Power Amplifier On to Switch",              "ubertooth.register.value.fsmtc.tc_paon2switch",
2544             FT_UINT16, BASE_DEC, NULL, 0x1C00,
2545             NULL, HFILL }
2546         },
2547         { &hf_cc2400_fsmtc_res,
2548             { "Reserved [9:6]",                            "ubertooth.register.value.fsmtc.reserved.9_6",
2549             FT_UINT16, BASE_DEC, NULL, 0x03C0,
2550             NULL, HFILL }
2551         },
2552         { &hf_cc2400_fsmtc_tc_txend2switch,
2553             { "Tx End to Switch",                          "ubertooth.register.value.fsmtc.tc_txend2switch",
2554             FT_UINT16, BASE_DEC, NULL, 0x0038,
2555             NULL, HFILL }
2556         },
2557         { &hf_cc2400_fsmtc_tc_txend2paoff,
2558             { "Tx End to Power Amplifier Off",             "ubertooth.register.value.fsmtc.tc_txend2paoff",
2559             FT_UINT16, BASE_DEC, NULL, 0x0007,
2560             NULL, HFILL }
2561         },
2562         { &hf_cc2400_reserved_0x0C_res_15_5,
2563             { "Reserved [15:5]",                           "ubertooth.register.value.reserved.0x0C.15_5",
2564             FT_UINT16, BASE_DEC, NULL, 0xFFE0,
2565             NULL, HFILL }
2566         },
2567         { &hf_cc2400_reserved_0x0C_res_4_0,
2568             { "Reserved [4:0]",                            "ubertooth.register.value.reserved.0x0C.4_0",
2569             FT_UINT16, BASE_DEC, NULL, 0x001F,
2570             NULL, HFILL }
2571         },
2572         { &hf_cc2400_manand_vga_reset_n,
2573             { "No VGA Reset",                              "ubertooth.register.value.manand.vga_reset_n",
2574             FT_BOOLEAN, 16, NULL, 0x8000,
2575             NULL, HFILL }
2576         },
2577         { &hf_cc2400_manand_lock_status,
2578             { "Lock Status",                               "ubertooth.register.value.manand.lock_status",
2579             FT_BOOLEAN, 16, NULL, 0x4000,
2580             NULL, HFILL }
2581         },
2582         { &hf_cc2400_manand_balun_ctrl,
2583             { "Balun Control",                             "ubertooth.register.value.manand.balun_ctrl",
2584             FT_BOOLEAN, 16, NULL, 0x2000,
2585             NULL, HFILL }
2586         },
2587         { &hf_cc2400_manand_rxtx,
2588             { "RxTx",                                      "ubertooth.register.value.manand.rxtx",
2589             FT_BOOLEAN, 16, NULL, 0x1000,
2590             NULL, HFILL }
2591         },
2592         { &hf_cc2400_manand_pre_pd,
2593             { "Power Down of Prescaler",                   "ubertooth.register.value.manand.pre_pd",
2594             FT_BOOLEAN, 16, NULL, 0x0800,
2595             NULL, HFILL }
2596         },
2597         { &hf_cc2400_manand_pa_n_pd,
2598             { "Power Down of Power Amplifier (negative path)",  "ubertooth.register.value.manand.pa_n_pd",
2599             FT_BOOLEAN, 16, NULL, 0x0400,
2600             NULL, HFILL }
2601         },
2602         { &hf_cc2400_manand_pa_p_pd,
2603             { "Power Down of Power Amplifier (positive path)",  "ubertooth.register.value.manand.pa_p_pd",
2604             FT_BOOLEAN, 16, NULL, 0x0200,
2605             NULL, HFILL }
2606         },
2607         { &hf_cc2400_manand_dac_lpf_pd,
2608             { "Power Down of Tx DAC",                      "ubertooth.register.value.manand.dac_lpf_pd",
2609             FT_BOOLEAN, 16, NULL, 0x0100,
2610             NULL, HFILL }
2611         },
2612         { &hf_cc2400_manand_bias_pd,
2613             { "Power Down control of global bias generator + XOSC clock buffer",         "ubertooth.register.value.manand.bias_pd",
2614             FT_BOOLEAN, 16, NULL, 0x0080,
2615             NULL, HFILL }
2616         },
2617         { &hf_cc2400_manand_xosc16m_pd,
2618             { "Power Down control of 16 MHz XOSC core",    "ubertooth.register.value.manand.xosc16m_pd",
2619             FT_BOOLEAN, 16, NULL, 0x0040,
2620             NULL, HFILL }
2621         },
2622         { &hf_cc2400_manand_chp_pd,
2623             { "Power Down control of Charge Pump",         "ubertooth.register.value.manand.chp_pd",
2624             FT_BOOLEAN, 16, NULL, 0x0020,
2625             NULL, HFILL }
2626         },
2627         { &hf_cc2400_manand_fs_pd,
2628             { "Power Down control of VCO, I/Q generator, LO buffers",     "ubertooth.register.value.manand.fs_pd",
2629             FT_BOOLEAN, 16, NULL, 0x0010,
2630             NULL, HFILL }
2631         },
2632         { &hf_cc2400_manand_adc_pd,
2633             { "Power Down control of the ADC",                            "ubertooth.register.value.manand.adc_pd",
2634             FT_BOOLEAN, 16, NULL, 0x0008,
2635             NULL, HFILL }
2636         },
2637         { &hf_cc2400_manand_vga_pd,
2638             { "Power Down control of the VGA",                            "ubertooth.register.value.manand.vga_pd",
2639             FT_BOOLEAN, 16, NULL, 0x0004,
2640             NULL, HFILL }
2641         },
2642         { &hf_cc2400_manand_rxbpf_pd,
2643             { "Power Down control of complex band-pass receive filter",   "ubertooth.register.value.manand.rxbpf_pd",
2644             FT_BOOLEAN, 16, NULL, 0x0002,
2645             NULL, HFILL }
2646         },
2647         { &hf_cc2400_manand_lnamix_pd,
2648             { "Power Down control of LNA, down-conversion mixers and front-end bias",    "ubertooth.register.value.manand.lnamix_pd",
2649             FT_BOOLEAN, 16, NULL, 0x0001,
2650             NULL, HFILL }
2651         },
2652         { &hf_cc2400_fsmstate_reserved_15_13,
2653             { "Reserved [15:13]",                          "ubertooth.register.value.fsmstate.reserved.15_13",
2654             FT_UINT16, BASE_DEC, NULL, 0xE000,
2655             NULL, HFILL }
2656         },
2657         { &hf_cc2400_fsmstate_fsm_state_bkpt,
2658             { "FSM breakpoint state",                      "ubertooth.register.value.fsmstate.fsm_state_bkpt",
2659             FT_UINT16, BASE_DEC, NULL, 0x1F00,
2660             NULL, HFILL }
2661         },
2662         { &hf_cc2400_fsmstate_reserved_7_5,
2663             { "Reserved [7:5]",                            "ubertooth.register.value.fsmstate.reserved.7_5",
2664             FT_UINT16, BASE_DEC, NULL, 0x00E0,
2665             NULL, HFILL }
2666         },
2667         { &hf_cc2400_fsmstate_fsm_cur_state,
2668             { "Current state of the finite state machine", "ubertooth.register.value.fsmstate.fsm_cur_state",
2669             FT_UINT16, BASE_DEC, NULL, 0x001F,
2670             NULL, HFILL }
2671         },
2672         { &hf_cc2400_adctst_reserved_15,
2673             { "Reserved [15]",                             "ubertooth.register.value.adctst.reserved.15",
2674             FT_BOOLEAN, 16, NULL, 0x8000,
2675             NULL, HFILL }
2676         },
2677         { &hf_cc2400_adctst_adc_i,
2678             { "Current ADC I-branch value",                "ubertooth.register.value.adctst.adc_i",
2679             FT_UINT16, BASE_DEC, NULL, 0x7F00,
2680             NULL, HFILL }
2681         },
2682         { &hf_cc2400_adctst_reserved_7,
2683             { "Reserved [7]",                              "ubertooth.register.value.adctst.reserved.7",
2684             FT_BOOLEAN, 16, NULL, 0x0080,
2685             NULL, HFILL }
2686         },
2687         { &hf_cc2400_adctst_adc_q,
2688             { "Current ADC Q-branch value",                "ubertooth.register.value.adctst.adc_q",
2689             FT_UINT16, BASE_DEC, NULL, 0x007F,
2690             NULL, HFILL }
2691         },
2692         { &hf_cc2400_rxbpftst_reserved,
2693             { "Reserved [15]",                             "ubertooth.register.value.rxbpftst.reserved.15",
2694             FT_BOOLEAN, 16, NULL, 0x8000,
2695             NULL, HFILL }
2696         },
2697         { &hf_cc2400_rxbpftst_rxbpf_cap_oe,
2698             { "RX band-pass filter capacitance calibration override enable",   "ubertooth.register.value.rxbpftst.rxbpf_cap_oe",
2699             FT_BOOLEAN, 16, NULL, 0x4000,
2700             NULL, HFILL }
2701         },
2702         { &hf_cc2400_rxbpftst_rxbpf_cap_o,
2703             { "RX band-pass filter capacitance calibration override value",    "ubertooth.register.value.rxbpftst.rxbpf_cap_o",
2704             FT_UINT16, BASE_DEC, NULL, 0x3F80,
2705             NULL, HFILL }
2706         },
2707         { &hf_cc2400_rxbpftst_rxbpf_cap_res,
2708             { "RX band-pass filter capacitance calibration result",    "ubertooth.register.value.rxbpftst.rxbpf_cap_res",
2709             FT_UINT16, BASE_DEC, NULL, 0x007F,
2710             NULL, HFILL }
2711         },
2712         { &hf_cc2400_pamtst_reserved_15_13,
2713             { "Reserved [15:13]",                          "ubertooth.register.value.pamtst.reserved.15_13",
2714             FT_UINT16, BASE_DEC, NULL, 0xE000,
2715             NULL, HFILL }
2716         },
2717         { &hf_cc2400_pamtst_vc_in_test_en,
2718             { "VC in Test En",                             "ubertooth.register.value.pamtst.vc_in_test_en",
2719             FT_BOOLEAN, 16, NULL, 0x1000,
2720             NULL, HFILL }
2721         },
2722         { &hf_cc2400_pamtst_atestmod_pd,
2723             { "Power down of the analog test module",      "ubertooth.register.value.pamtst.atestmod_pd",
2724             FT_BOOLEAN, 16, NULL, 0x0800,
2725             NULL, HFILL }
2726         },
2727         { &hf_cc2400_pamtst_atestmod_mode,
2728             { "Function of the Analog Test Module",        "ubertooth.register.value.pamtst.atestmod_mode",
2729             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_atestmod_mode_vals_ext, 0x0700,
2730             NULL, HFILL }
2731         },
2732         { &hf_cc2400_pamtst_reserved_7,
2733             { "Reserved [7]",                              "ubertooth.register.value.pamtst.reserved.7",
2734             FT_BOOLEAN, 16, NULL, 0x0080,
2735             NULL, HFILL }
2736         },
2737         { &hf_cc2400_pamtst_txmix_cap_array,
2738             { "Varactor array settings in the transmit mixers", "ubertooth.register.value.pamtst.txmix_cap_array",
2739             FT_UINT16, BASE_DEC, NULL, 0x0060,
2740             NULL, HFILL }
2741         },
2742         { &hf_cc2400_pamtst_txmix_current,
2743             { "Transmit Mixers Current",                   "ubertooth.register.value.pamtst.txmix_current",
2744             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_txmix_current_vals_ext, 0x0018,
2745             NULL, HFILL }
2746         },
2747         { &hf_cc2400_pamtst_pa_current,
2748             { "Power Amplifier Current",                   "ubertooth.register.value.pamtst.pa_current",
2749             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_pa_current_vals_ext, 0x0007,
2750             NULL, HFILL }
2751         },
2752         { &hf_cc2400_lmtst_reserved,
2753             { "Reserved [15:14]",                          "ubertooth.register.value.lmtst.reserved.15_14",
2754             FT_UINT16, BASE_DEC, NULL, 0xC000,
2755             NULL, HFILL }
2756         },
2757         { &hf_cc2400_lmtst_rxmix_hgm,
2758             { "Receiver Mixers High Gain Mode Enable",     "ubertooth.register.value.lmtst.rxmix_hgm",
2759             FT_BOOLEAN, 16, NULL, 0x2000,
2760             NULL, HFILL }
2761         },
2762         { &hf_cc2400_lmtst_rxmix_tail,
2763             { "Receiver Mixers Output Current",            "ubertooth.register.value.lmtst.rxmix_tail",
2764             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_tail_vals_ext, 0x1800,
2765             NULL, HFILL }
2766         },
2767         { &hf_cc2400_lmtst_rxmix_vcm,
2768             { "Controls VCM level in the mixer feedback loop",  "ubertooth.register.value.lmtst.rxmix_vcm",
2769             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_vcm_vals_ext, 0x0600,
2770             NULL, HFILL }
2771         },
2772         { &hf_cc2400_lmtst_rxmix_current,
2773             { "Controls current in the mixer",             "ubertooth.register.value.lmtst.rxmix_current",
2774             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_current_vals_ext, 0x0180,
2775             NULL, HFILL }
2776         },
2777         { &hf_cc2400_lmtst_lna_cap_array,
2778             { "Varactor array setting in the LNA",         "ubertooth.register.value.lmtst.lna_cap_array",
2779             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_cap_array_vals_ext, 0x0060,
2780             NULL, HFILL }
2781         },
2782         { &hf_cc2400_lmtst_lna_lowgain,
2783             { "Low gain mode of the LNA",                  "ubertooth.register.value.lmtst.lna_lowgain",
2784             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_lowgain_vals_ext, 0x0010,
2785             NULL, HFILL }
2786         },
2787         { &hf_cc2400_lmtst_lna_gain,
2788             { "Controls current in the LNA gain compensation branch",  "ubertooth.register.value.lmtst.lna_gain",
2789             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_gain_vals_ext, 0x000C,
2790             NULL, HFILL }
2791         },
2792         { &hf_cc2400_lmtst_lna_current,
2793             { "Main current in the LNA",                   "ubertooth.register.value.lmtst.lna_current",
2794             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_current_vals_ext, 0x003,
2795             NULL, HFILL }
2796         },
2797         { &hf_cc2400_manor_vga_reset_n,
2798             { "No VGA Reset",                              "ubertooth.register.value.manor.vga_reset_n",
2799             FT_BOOLEAN, 16, NULL, 0x8000,
2800             NULL, HFILL }
2801         },
2802         { &hf_cc2400_manor_lock_status,
2803             { "Lock Status",                               "ubertooth.register.value.manor.lock_status",
2804             FT_BOOLEAN, 16, NULL, 0x4000,
2805             NULL, HFILL }
2806         },
2807         { &hf_cc2400_manor_balun_ctrl,
2808             { "Balun Control",                             "ubertooth.register.value.manor.balun_ctrl",
2809             FT_BOOLEAN, 16, NULL, 0x2000,
2810             NULL, HFILL }
2811         },
2812         { &hf_cc2400_manor_rxtx,
2813             { "RxTx",                                      "ubertooth.register.value.manor.rxtx",
2814             FT_BOOLEAN, 16, NULL, 0x1000,
2815             NULL, HFILL }
2816         },
2817         { &hf_cc2400_manor_pre_pd,
2818             { "Power Down of Prescaler",                   "ubertooth.register.value.manor.pre_pd",
2819             FT_BOOLEAN, 16, NULL, 0x0800,
2820             NULL, HFILL }
2821         },
2822         { &hf_cc2400_manor_pa_n_pd,
2823             { "Power Down of Power Amplifier (negative path)",  "ubertooth.register.value.manor.pa_n_pd",
2824             FT_BOOLEAN, 16, NULL, 0x0400,
2825             NULL, HFILL }
2826         },
2827         { &hf_cc2400_manor_pa_p_pd,
2828             { "Power Down of Power Amplifier (positive path)",  "ubertooth.register.value.manor.pa_p_pd",
2829             FT_BOOLEAN, 16, NULL, 0x0200,
2830             NULL, HFILL }
2831         },
2832         { &hf_cc2400_manor_dac_lpf_pd,
2833             { "Power Down of Tx DAC",                      "ubertooth.register.value.manor.dac_lpf_pd",
2834             FT_BOOLEAN, 16, NULL, 0x0100,
2835             NULL, HFILL }
2836         },
2837         { &hf_cc2400_manor_bias_pd,
2838             { "Power Down control of global bias generator + XOSC clock buffer",         "ubertooth.register.value.manor.bias_pd",
2839             FT_BOOLEAN, 16, NULL, 0x0080,
2840             NULL, HFILL }
2841         },
2842         { &hf_cc2400_manor_xosc16m_pd,
2843             { "Power Down control of 16 MHz XOSC core",    "ubertooth.register.value.manor.xosc16m_pd",
2844             FT_BOOLEAN, 16, NULL, 0x0040,
2845             NULL, HFILL }
2846         },
2847         { &hf_cc2400_manor_chp_pd,
2848             { "Power Down control of Charge Pump",         "ubertooth.register.value.manor.chp_pd",
2849             FT_BOOLEAN, 16, NULL, 0x0020,
2850             NULL, HFILL }
2851         },
2852         { &hf_cc2400_manor_fs_pd,
2853             { "Power Down control of VCO, I/Q generator, LO buffers",     "ubertooth.register.value.manor.fs_pd",
2854             FT_BOOLEAN, 16, NULL, 0x0010,
2855             NULL, HFILL }
2856         },
2857         { &hf_cc2400_manor_adc_pd,
2858             { "Power Down control of the ADC",                            "ubertooth.register.value.manor.adc_pd",
2859             FT_BOOLEAN, 16, NULL, 0x0008,
2860             NULL, HFILL }
2861         },
2862         { &hf_cc2400_manor_vga_pd,
2863             { "Power Down control of the VGA",                            "ubertooth.register.value.manor.vga_pd",
2864             FT_BOOLEAN, 16, NULL, 0x0004,
2865             NULL, HFILL }
2866         },
2867         { &hf_cc2400_manor_rxbpf_pd,
2868             { "Power Down control of complex band-pass receive filter",   "ubertooth.register.value.manor.rxbpf_pd",
2869             FT_BOOLEAN, 16, NULL, 0x0002,
2870             NULL, HFILL }
2871         },
2872         { &hf_cc2400_manor_lnamix_pd,
2873             { "Power Down control of LNA, down-conversion mixers and front-end bias",    "ubertooth.register.value.manor.lnamix_pd",
2874             FT_BOOLEAN, 16, NULL, 0x0001,
2875             NULL, HFILL }
2876         },
2877         { &hf_cc2400_mdmtst0_reserved,
2878             { "Reserved [15:14]",                          "ubertooth.register.value.mdmtst0.reserved.15_14",
2879             FT_UINT16, BASE_DEC, NULL, 0xC000,
2880             NULL, HFILL }
2881         },
2882         { &hf_cc2400_mdmtst0_tx_prng,
2883             { "Tx PRNG",                                   "ubertooth.register.value.mdmtst0.tx_prng",
2884             FT_BOOLEAN, 16, NULL, 0x2000,
2885             NULL, HFILL }
2886         },
2887         { &hf_cc2400_mdmtst0_tx_1mhz_offset_n,
2888             { "Tx No 1MHz Offset",                         "ubertooth.register.value.mdmtst0.tx_1mhz_offset_n",
2889             FT_BOOLEAN, 16, NULL, 0x1000,
2890             NULL, HFILL }
2891         },
2892         { &hf_cc2400_mdmtst0_invert_data,
2893             { "Invert Data",                               "ubertooth.register.value.mdmtst0.invert_data",
2894             FT_BOOLEAN, 16, NULL, 0x0800,
2895             NULL, HFILL }
2896         },
2897         { &hf_cc2400_mdmtst0_afc_adjust_on_packet,
2898             { "AFC Adjust on Packet",                      "ubertooth.register.value.mdmtst0.afc_adjust_on_packet",
2899             FT_BOOLEAN, 16, NULL, 0x0400,
2900             NULL, HFILL }
2901         },
2902         { &hf_cc2400_mdmtst0_afc_settling,
2903             { "AFC Settling",                              "ubertooth.register.value.mdmtst0.afc_settling",
2904             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_mdmtst0_afc_settling_vals_ext, 0x0300,
2905             NULL, HFILL }
2906         },
2907         { &hf_cc2400_mdmtst0_afc_delta,
2908             { "AFC Delta",                                 "ubertooth.register.value.mdmtst0.afc_delta",
2909             FT_UINT16, BASE_DEC, NULL, 0x00FF,
2910             NULL, HFILL }
2911         },
2912         { &hf_cc2400_mdmtst1_reserved,
2913             { "Reserved [15:7]",                           "ubertooth.register.value.mdmtst1.reserved.15_7",
2914             FT_UINT16, BASE_DEC, NULL, 0xFF80,
2915             NULL, HFILL }
2916         },
2917         { &hf_cc2400_mdmtst1_bsync_threshold,
2918             { "B-Sync Threshold",                          "ubertooth.register.value.mdmtst1.bsync_threshold",
2919             FT_UINT16, BASE_DEC, NULL, 0x07F,
2920             NULL, HFILL }
2921         },
2922         { &hf_cc2400_dactst_reserved,
2923             { "Reserved [15]",                             "ubertooth.register.value.dactst.reserved.15",
2924             FT_BOOLEAN, 16, NULL, 0x8000,
2925             NULL, HFILL }
2926         },
2927         { &hf_cc2400_dactst_dac_src,
2928             { "DAC Source",                                "ubertooth.register.value.dactst.dac_src",
2929             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_dactst_dac_src_vals_ext, 0x7000,
2930             NULL, HFILL }
2931         },
2932         { &hf_cc2400_dactst_dac_i_o,
2933             { "I-branch DAC Override Value",               "ubertooth.register.value.dactst.dac_i_o",
2934             FT_UINT16, BASE_DEC, NULL, 0x0FC0,
2935             NULL, HFILL }
2936         },
2937         { &hf_cc2400_dactst_dac_q_o,
2938             { "Q-branch DAC Override Value",               "ubertooth.register.value.dactst.dac_q_o",
2939             FT_UINT16, BASE_DEC, NULL, 0x003F,
2940             NULL, HFILL }
2941         },
2942         { &hf_cc2400_agctst0_agc_settle_blank_dn,
2943             { "AGC Settle Blank Down",                     "ubertooth.register.value.agctst0.agc_settle_blank_down",
2944             FT_UINT16, BASE_DEC, NULL, 0xE000,
2945             "Duration of blanking signal in 8 MHz clock cycles", HFILL }
2946         },
2947         { &hf_cc2400_agctst0_agc_win_size,
2948             { "AGC Window Size",                           "ubertooth.register.value.agctst0.agc_win_size",
2949             FT_UINT16, BASE_DEC, NULL, 0x1800,
2950             NULL, HFILL }
2951         },
2952         { &hf_cc2400_agctst0_agc_settle_peak,
2953             { "AGC Settle Peak Period",                    "ubertooth.register.value.agctst0.agc_settle_peak",
2954             FT_UINT16, BASE_DEC, NULL, 0x0780,
2955             NULL, HFILL }
2956         },
2957         { &hf_cc2400_agctst0_agc_settle_adc,
2958             { "AGC Settle ADC Period",                    "ubertooth.register.value.agctst0.agc_settle_adc",
2959             FT_UINT16, BASE_DEC, NULL, 0x0078,
2960             NULL, HFILL }
2961         },
2962         { &hf_cc2400_agctst0_agc_attempts,
2963             { "AGC Attempts",                              "ubertooth.register.value.agctst0.agc_attempts",
2964             FT_UINT16, BASE_DEC, NULL, 0x0007,
2965             NULL, HFILL }
2966         },
2967         { &hf_cc2400_agctst1_reserved,
2968             { "Reserved [15]",                             "ubertooth.register.value.agctst1.reserved.15",
2969             FT_BOOLEAN, 16, NULL, 0x8000,
2970             NULL, HFILL }
2971         },
2972         { &hf_cc2400_agctst1_agc_var_gain_sat,
2973             { "AGC Variable Gain Stage",                   "ubertooth.register.value.agctst1.agc_var_gain_sat",
2974             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_agctst1_agc_var_gain_sat_vals_ext, 0x4000,
2975             NULL, HFILL }
2976         },
2977         { &hf_cc2400_agctst1_agc_settle_blank_up,
2978             { "AGC Settle Bank Up",                        "ubertooth.register.value.agctst1.agc_settle_blank_up",
2979             FT_UINT16, BASE_DEC, NULL, 0x3800,
2980             "Duration of blanking signal in 8 MHz clock cycles", HFILL }
2981         },
2982         { &hf_cc2400_agctst1_peakdet_cur_boost,
2983             { "Current Peak Detectors Boost",              "ubertooth.register.value.agctst1.peakdet_cur_boost",
2984             FT_BOOLEAN, 16, NULL, 0x0400,
2985             NULL, HFILL }
2986         },
2987         { &hf_cc2400_agctst1_agc_mult_slow,
2988             { "AGC Timing Multiplier Slow Mode",           "ubertooth.register.value.agctst1.agc_mult_slow",
2989             FT_UINT16, BASE_DEC, NULL, 0x03C0,
2990             NULL, HFILL }
2991         },
2992         { &hf_cc2400_agctst1_agc_settle_fixed,
2993             { "AGC Settling Period Fixed Gain Step",       "ubertooth.register.value.agctst1.agc_settle_fixed",
2994             FT_UINT16, BASE_DEC, NULL, 0x003C,
2995             NULL, HFILL }
2996         },
2997         { &hf_cc2400_agctst1_agc_settle_var,
2998             { "AGC Settling Period Variable Gain Step",    "ubertooth.register.value.agctst1.agc_settle_var",
2999             FT_UINT16, BASE_DEC, NULL, 0x0003,
3000             NULL, HFILL }
3001         },
3002         { &hf_cc2400_agctst2_reserved,
3003             { "Reserved [15:14]",                          "ubertooth.register.value.agctst2.reserved.15_14",
3004             FT_UINT16, BASE_DEC, NULL, 0xC000,
3005             NULL, HFILL }
3006         },
3007         { &hf_cc2400_agctst2_agc_backend_blanking,
3008             { "AGC Backend Blanking",                      "ubertooth.register.value.agctst2.agc_backend_blanking",
3009             FT_UINT16, BASE_DEC, NULL, 0x3000,
3010             NULL, HFILL }
3011         },
3012         { &hf_cc2400_agctst2_agc_adjust_m3db,
3013             { "AGC Adjust -3db",                           "ubertooth.register.value.agctst2.agc_adjust_m3db",
3014             FT_UINT16, BASE_DEC, NULL, 0x0E00,
3015             NULL, HFILL }
3016         },
3017         { &hf_cc2400_agctst2_agc_adjust_m1db,
3018             { "AGC Adjust -1db",                           "ubertooth.register.value.agctst2.agc_adjust_m1db",
3019             FT_UINT16, BASE_DEC, NULL, 0x01C0,
3020             NULL, HFILL }
3021         },
3022         { &hf_cc2400_agctst2_agc_adjust_p3db,
3023             { "AGC Adjust +3db",                           "ubertooth.register.value.agctst2.agc_adjust_p3db",
3024             FT_UINT16, BASE_DEC, NULL, 0x0038,
3025             NULL, HFILL }
3026         },
3027         { &hf_cc2400_agctst2_agc_adjust_p1db,
3028             { "AGC Adjust +1db",                           "ubertooth.register.value.agctst2.agc_adjust_p1db",
3029             FT_UINT16, BASE_DEC, NULL, 0x0007,
3030             NULL, HFILL }
3031         },
3032         { &hf_cc2400_fstst0_rxmixbuf_cur,
3033             { "Rx Mixer Buffer Bias Current",      "ubertooth.register.value.fstst0.rxmixbuf_cur",
3034             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst0_rxtxmixbuf_cur_vals_ext, 0xC000,
3035             NULL, HFILL }
3036         },
3037         { &hf_cc2400_fstst0_txmixbuf_cur,
3038             { "TX Mixer Buffer Bias Current",     "ubertooth.register.value.fstst0.txmixbuf_cur",
3039             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst0_rxtxmixbuf_cur_vals_ext, 0x3000,
3040             NULL, HFILL }
3041         },
3042         { &hf_cc2400_fstst0_vco_array_settle_long,
3043             { "Voltage Controlled Oscillator Array Settle Long",              "ubertooth.register.value.fstst0.vco_array_settle_lon",
3044             FT_BOOLEAN, 16, NULL, 0x0800,
3045             NULL, HFILL }
3046         },
3047         { &hf_cc2400_fstst0_vco_array_oe,
3048             { "Voltage Controlled Oscillator Array Manual Override Enable",   "ubertooth.register.value.fstst0.vco_array_oe",
3049             FT_BOOLEAN, 16, NULL, 0x0400,
3050             NULL, HFILL }
3051         },
3052         { &hf_cc2400_fstst0_vco_array_o,
3053             { "Voltage Controlled Oscillator Array Override Value",           "ubertooth.register.value.fstst0.vco_array_o",
3054             FT_UINT16, BASE_DEC, NULL, 0x03E0,
3055             NULL, HFILL }
3056         },
3057         { &hf_cc2400_fstst0_vco_array_res,
3058             { "Resulting VCO Array Setting from Last Calibration",            "ubertooth.register.value.fstst0.vco_array_res",
3059             FT_UINT16, BASE_DEC, NULL, 0x001F,
3060             NULL, HFILL }
3061         },
3062         { &hf_cc2400_fstst1_rxbpf_locur,
3063             { "Rx Band-pass Filters LO Bias Current",      "ubertooth.register.value.fstst1.rxbpf_locur",
3064             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_rxbpf_locur_vals_ext, 0x8000,
3065             NULL, HFILL }
3066         },
3067         { &hf_cc2400_fstst1_rxbpf_midcur,
3068             { "Rx Band-pass Filters MID Bias Current",     "ubertooth.register.value.fstst1.rxbpf_midcur",
3069             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_rxbpf_midcur_vals_ext, 0x4000,
3070             NULL, HFILL }
3071         },
3072         { &hf_cc2400_fstst1_vco_current_ref,
3073             { "VCO Current Reference",                     "ubertooth.register.value.fstst1.vco_current_ref",
3074             FT_UINT16, BASE_DEC, NULL, 0x3C00,
3075             NULL, HFILL }
3076         },
3077         { &hf_cc2400_fstst1_vco_current_k,
3078             { "VCO Current Calibration Constant",          "ubertooth.register.value.fstst1.vco_current_k",
3079             FT_UINT16, BASE_DEC, NULL, 0x03F0,
3080             NULL, HFILL }
3081         },
3082         { &hf_cc2400_fstst1_vc_dac_en,
3083             { "VCO Source",                                "ubertooth.register.value.fstst1.vc_dac_en",
3084             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_vc_dac_en_vals_ext, 0x0008,
3085             NULL, HFILL }
3086         },
3087         { &hf_cc2400_fstst1_vc_dac_val,
3088             { "VCO DAC Output Value",                      "ubertooth.register.value.fstst1.vc_dac_val",
3089             FT_UINT16, BASE_DEC, NULL, 0x0007,
3090             NULL, HFILL }
3091         },
3092         { &hf_cc2400_fstst2_reserved,
3093             { "Reserved [15]",                                                "ubertooth.register.value.fstst2.reserved.15",
3094             FT_BOOLEAN, 16, NULL, 0x8000,
3095             NULL, HFILL }
3096         },
3097         { &hf_cc2400_fstst2_vco_curcal_speed,
3098             { "Voltage Controlled Oscillator Current Calibration",            "ubertooth.register.value.fstst2.vco_curcal_speed",
3099             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst2_vco_curcal_speed_vals_ext, 0x6000,
3100             NULL, HFILL }
3101         },
3102         { &hf_cc2400_fstst2_vco_current_oe,
3103             { "Voltage Controlled Oscillator Current Manual Override Enable", "ubertooth.register.value.fstst2.vco_current_oe",
3104             FT_BOOLEAN, 16, NULL, 0x1000,
3105             NULL, HFILL }
3106         },
3107         { &hf_cc2400_fstst2_vco_current_o,
3108             { "Voltage Controlled Oscillator Current Override Value",         "ubertooth.register.value.fstst2.vco_current_o",
3109             FT_UINT16, BASE_DEC, NULL, 0x0FC0,
3110             NULL, HFILL }
3111         },
3112         { &hf_cc2400_fstst2_vco_current_res,
3113             { "Resulting VCO Current Setting from Last Calibration",          "ubertooth.register.value.fstst2.vco_current_res",
3114             FT_UINT16, BASE_DEC, NULL, 0x003F,
3115             NULL, HFILL }
3116         },
3117         { &hf_cc2400_fstst3_reserved,
3118             { "Reserved [15:14]",                          "ubertooth.register.value.fstst3.reserved.15_14",
3119             FT_UINT16, BASE_DEC, NULL, 0xC000,
3120             NULL, HFILL }
3121         },
3122         { &hf_cc2400_fstst3_chp_test_up,
3123             { "Charge Pump Test Up",                       "ubertooth.register.value.fstst3.chp_test_up",
3124             FT_BOOLEAN, 16, NULL, 0x2000,
3125             NULL, HFILL }
3126         },
3127         { &hf_cc2400_fstst3_chp_test_dn,
3128             { "Charge Pump Test Down",                     "ubertooth.register.value.fstst3.chp_test_down",
3129             FT_BOOLEAN, 16, NULL, 0x1000,
3130             NULL, HFILL }
3131         },
3132         { &hf_cc2400_fstst3_chp_disable,
3133             { "Charge Pump Disable",                       "ubertooth.register.value.fstst3.chp_disable",
3134             FT_BOOLEAN, 16, NULL, 0x0800,
3135             NULL, HFILL }
3136         },
3137         { &hf_cc2400_fstst3_pd_delay,
3138             { "Phase Detector Delay",                      "ubertooth.register.value.fstst3.pd_delay",
3139             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst3_pd_delay_vals_ext, 0x0400,
3140             NULL, HFILL }
3141         },
3142         { &hf_cc2400_fstst3_chp_step_period,
3143             { "Charge Pump Step Period",                   "ubertooth.register.value.fstst3.chp_step_period",
3144             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst3_chp_step_period_vals_ext, 0x0300,
3145             NULL, HFILL }
3146         },
3147         { &hf_cc2400_fstst3_stop_chp_current,
3148             { "Stop Charge Pump Current",                  "ubertooth.register.value.fstst3.stop_chp_current",
3149             FT_UINT16, BASE_DEC, NULL, 0x00F0,
3150             NULL, HFILL }
3151         },
3152         { &hf_cc2400_fstst3_start_chp_current,
3153             { "Start Charge Pump Current",                 "ubertooth.register.value.fstst3.start_chp_current",
3154             FT_UINT16, BASE_DEC, NULL, 0x000F,
3155             NULL, HFILL }
3156         },
3157
3158         { &hf_cc2400_manfidl_partnum,
3159             { "Part Number [3:0]",                         "ubertooth.register.value.manfidl.partnum",
3160             FT_UINT16, BASE_DEC, NULL, 0xF000,
3161             NULL, HFILL }
3162         },
3163         { &hf_cc2400_manfidl_manfid,
3164             { "Manufacturer ID",                           "ubertooth.register.value.manfidl.manfid",
3165             FT_UINT16, BASE_HEX, NULL, 0x0FFF,
3166             NULL, HFILL }
3167         },
3168         { &hf_cc2400_manfidh_version,
3169             { "Version",                                   "ubertooth.register.value.manfidh.version",
3170             FT_UINT16, BASE_DEC, NULL, 0xF000,
3171             NULL, HFILL }
3172         },
3173         { &hf_cc2400_manfidh_partnum,
3174             { "Part Number [15:4]",                        "ubertooth.register.value.manfidh.partnum",
3175             FT_UINT16, BASE_DEC, NULL, 0x0FFF,
3176             NULL, HFILL }
3177         },
3178         { &hf_cc2400_grmdm_reserved,
3179             { "Reserved [15]",                             "ubertooth.register.value.grmdm.reserved.15",
3180             FT_BOOLEAN, 16, NULL, 0x8000,
3181             NULL, HFILL }
3182         },
3183         { &hf_cc2400_grmdm_sync_errbits_allowed,
3184             { "Sync Error Bits Allowed",                   "ubertooth.register.value.grmdm.sync_errbits_allowed",
3185             FT_UINT16, BASE_DEC, NULL, 0x6000,
3186             NULL, HFILL }
3187         },
3188         { &hf_cc2400_grmdm_pin_mode,
3189             { "PIN Mode",                                  "ubertooth.register.value.grmdm.pin_mode",
3190             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_pin_mode_vals_ext, 0x1800,
3191             NULL, HFILL }
3192         },
3193         { &hf_cc2400_grmdm_packet_mode,
3194             { "Packet Mode",                               "ubertooth.register.value.grmdm.packet_mode",
3195             FT_BOOLEAN, 16, NULL, 0x0400,
3196             NULL, HFILL }
3197         },
3198         { &hf_cc2400_grmdm_pre_bytes,
3199             { "Preamble Bytes",                            "ubertooth.register.value.grmdm.pre_bytes",
3200             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_pre_bytes_vals_ext, 0x0380,
3201             NULL, HFILL }
3202         },
3203         { &hf_cc2400_grmdm_sync_word_size,
3204             { "Sync Word Size",                            "ubertooth.register.value.grmdm.sync_word_size",
3205             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_sync_word_size_vals_ext, 0x0060,
3206             NULL, HFILL }
3207         },
3208         { &hf_cc2400_grmdm_crc_on,
3209             { "CRC On",                                    "ubertooth.register.value.grmdm.crc_on",
3210             FT_BOOLEAN, 16, NULL, 0x0010,
3211             NULL, HFILL }
3212         },
3213         { &hf_cc2400_grmdm_data_format,
3214             { "Data Format",                               "ubertooth.register.value.grmdm.data_format",
3215             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_data_format_vals_ext, 0x000C,
3216             NULL, HFILL }
3217         },
3218         { &hf_cc2400_grmdm_modulation_format,
3219             { "Modulation Format",                         "ubertooth.register.value.grmdm.modulation_format",
3220             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_modulation_format_vals_ext, 0x0002,
3221             NULL, HFILL }
3222         },
3223         { &hf_cc2400_grmdm_tx_gaussian_filter,
3224             { "Tx Gaussian Filter",                        "ubertooth.register.value.grmdm.tx_gaussian_filter",
3225             FT_BOOLEAN, 16, NULL, 0x0001,
3226             NULL, HFILL }
3227         },
3228         { &hf_cc2400_grdec_reserved,
3229             { "Reserved [15:13]",                          "ubertooth.register.value.grdec.reserved.15_13",
3230             FT_UINT16, BASE_DEC, NULL, 0xE000,
3231             NULL, HFILL }
3232         },
3233         { &hf_cc2400_grdec_ind_saturation,
3234             { "Ind Saturation",                            "ubertooth.register.value.grdec.ind_saturation",
3235             FT_BOOLEAN, 16, NULL, 0x1000,
3236             NULL, HFILL }
3237         },
3238         { &hf_cc2400_grdec_dec_shift,
3239             { "Decimation Shift",                          "ubertooth.register.value.grdec.dec_shift",
3240             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grdec_dec_shift_vals_ext, 0x0C00,
3241             NULL, HFILL }
3242         },
3243         { &hf_cc2400_grdec_channel_dec,
3244             { "Channel Decimation",                        "ubertooth.register.value.grdec.channel_dec",
3245             FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grdec_channel_dec_vals_ext, 0x0300,
3246             NULL, HFILL }
3247         },
3248         { &hf_cc2400_grdec_dec_val,
3249             { "Decimation Value",                          "ubertooth.register.value.grdec.dec_val",
3250             FT_UINT16, BASE_DEC, NULL, 0x00FF,
3251             NULL, HFILL }
3252         },
3253         { &hf_cc2400_pktstatus_reserved_15_11,
3254             { "Reserved [15:11]",                          "ubertooth.register.value.pktstatus.reserved.15_11",
3255             FT_UINT16, BASE_DEC, NULL, 0xF800,
3256             NULL, HFILL }
3257         },
3258         { &hf_cc2400_pktstatus_sync_word_received,
3259             { "Sync Word Received",                        "ubertooth.register.value.pktstatus.sync_word_received",
3260             FT_BOOLEAN, 16, NULL, 0x0400,
3261             NULL, HFILL }
3262         },
3263         { &hf_cc2400_pktstatus_crc_ok,
3264             { "CRC OK",                                    "ubertooth.register.value.pktstatus.crc_ok",
3265             FT_BOOLEAN, 16, NULL, 0x0200,
3266             NULL, HFILL }
3267         },
3268         { &hf_cc2400_pktstatus_reserved_8,
3269             { "Reserved [8]",                              "ubertooth.register.value.pktstatus.reserved.8",
3270             FT_BOOLEAN, 16, NULL, 0x0100,
3271             NULL, HFILL }
3272         },
3273         { &hf_cc2400_pktstatus_reserved_7_0,
3274             { "Reserved [7:0]",                            "ubertooth.register.value.pktstatus.reserved.7_0",
3275             FT_UINT16, BASE_DEC, NULL, 0x00FF,
3276             NULL, HFILL }
3277         },
3278     };
3279
3280     static ei_register_info ei[] = {
3281         { &ei_unexpected_response, { "ubertooth.unexpected_response", PI_PROTOCOL, PI_ERROR, "Unexpected response for this command", EXPFILL }},
3282         { &ei_unknown_data, { "ubertooth.unknown_data", PI_PROTOCOL, PI_NOTE, "Unknown data", EXPFILL }},
3283         { &ei_unexpected_data, { "ubertooth.unexpected_data", PI_PROTOCOL, PI_WARN, "Unexpected data", EXPFILL }},
3284     };
3285
3286     static gint *ett[] = {
3287         &ett_ubertooth,
3288         &ett_command,
3289         &ett_usb_rx_packet,
3290         &ett_usb_rx_packet_data,
3291         &ett_entry,
3292         &ett_register_value,
3293         &ett_fsdiv_frequency
3294     };
3295
3296     command_info = wmem_tree_new_autoreset(wmem_epan_scope(), wmem_file_scope());
3297
3298     proto_ubertooth = proto_register_protocol("Ubertooth", "UBERTOOTH", "ubertooth");
3299     proto_register_field_array(proto_ubertooth, hf, array_length(hf));
3300     proto_register_subtree_array(ett, array_length(ett));
3301     ubertooth_handle = new_register_dissector("ubertooth", dissect_ubertooth, proto_ubertooth);
3302
3303     expert_module = expert_register_protocol(proto_ubertooth);
3304     expert_register_field_array(expert_module, ei, array_length(ei));
3305
3306     module = prefs_register_protocol(proto_ubertooth, NULL);
3307     prefs_register_static_text_preference(module, "version",
3308             "Ubertooth Firmware: 2012-10-R1 (also latest version prior to: git-4470774)",
3309             "Version of protocol supported by this dissector.");
3310 }
3311
3312 void
3313 proto_reg_handoff_ubertooth(void)
3314 {
3315     btle_handle = find_dissector("btle");
3316
3317     dissector_add_uint("usb.product", (0x1d50 << 16) | 0x6000, ubertooth_handle); /* Ubertooth Zero */
3318     dissector_add_uint("usb.product", (0x1d50 << 16) | 0x6002, ubertooth_handle); /* Ubertooth One */
3319
3320     dissector_add_handle("usb.device",   ubertooth_handle);
3321     dissector_add_handle("usb.protocol", ubertooth_handle);
3322 }
3323
3324 /*
3325  * Editor modelines  -  http://www.wireshark.org/tools/modelines.html
3326  *
3327  * Local variables:
3328  * c-basic-offset: 4
3329  * tab-width: 8
3330  * indent-tabs-mode: nil
3331  * End:
3332  *
3333  * vi: set shiftwidth=4 tabstop=8 expandtab:
3334  * :indentSize=4:tabSize=8:noTabs=true:
3335  */