RISC-V: Show accurate per-hart isa in /proc/cpuinfo
authorEvan Green <evan@rivosinc.com>
Mon, 6 Nov 2023 23:24:39 +0000 (15:24 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 7 Nov 2023 23:13:09 +0000 (15:13 -0800)
commitd3d2cf1acab1857ae1982d431be9d96dc0e0775c
treeba7b33ea7e2ad81b1187af584b532830ee0be8d6
parent28ea54bade76e2d47cb8cdb96e427cfb90d3eea7
RISC-V: Show accurate per-hart isa in /proc/cpuinfo

In /proc/cpuinfo, most of the information we show for each processor is
specific to that hart: marchid, mvendorid, mimpid, processor, hart,
compatible, and the mmu size. But the ISA string gets filtered through a
lowest common denominator mask, so that if one CPU is missing an ISA
extension, no CPUs will show it.

Now that we track the ISA extensions for each hart, let's report ISA
extension info accurately per-hart in /proc/cpuinfo. We cannot change
the "isa:" line, as usermode may be relying on that line to show only
the common set of extensions supported across all harts. Add a new "hart
isa" line instead, which reports the true set of extensions for that
hart.

Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231106232439.3176268-1-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/riscv/uabi.rst
arch/riscv/kernel/cpu.c