Merge branch 'msm-next-lumag' into HEAD

[sfrench/cifs-2.6.git] / drivers / gpu / drm / msm / adreno / a6xx_gpu.c

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 36c8fb699b56be46193c3a04c41868b858df7e70..aae60cbd9164d347a3693186f2eda5f29c7749df 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1270,6 +1270,12 @@ static void a6xx_recover(struct msm_gpu *gpu)
        if (hang_debug)
                a6xx_dump(gpu);
 
+       /*
+        * To handle recovery specific sequences during the rpm suspend we are
+        * about to trigger
+        */
+       a6xx_gpu->hung = true;
+
        /* Halt SQE first */
        gpu_write(gpu, REG_A6XX_CP_SQE_CNTL, 3);
 
@@ -1312,6 +1318,7 @@ static void a6xx_recover(struct msm_gpu *gpu)
        mutex_unlock(&gpu->active_lock);
 
        msm_gpu_hw_init(gpu);
+       a6xx_gpu->hung = false;
 }
 
 static const char *a6xx_uche_fault_block(struct msm_gpu *gpu, u32 mid)
@@ -2021,7 +2028,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
         * to cause power supply issues:
         */
        if (adreno_is_a618(adreno_gpu) || adreno_is_7c3(adreno_gpu))
-               gpu->clamp_to_idle = true;
+               priv->gpu_clamp_to_idle = true;
 
        /* Check if there is a GMU phandle and set it up */
        node = of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0);