drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #ifndef __HNAE3_H
   5 #define __HNAE3_H
   6
   7 /* Names used in this framework:
   8  *      ae handle (handle):
   9  *        a set of queues provided by AE
  10  *      ring buffer queue (rbq):
  11  *        the channel between upper layer and the AE, can do tx and rx
  12  *      ring:
  13  *        a tx or rx channel within a rbq
  14  *      ring description (desc):
  15  *        an element in the ring with packet information
  16  *      buffer:
  17  *        a memory region referred by desc with the full packet payload
  18  *
  19  * "num" means a static number set as a parameter, "count" mean a dynamic
  20  *   number set while running
  21  * "cb" means control block
  22  */
  23
  24 #include <linux/acpi.h>
  25 #include <linux/dcbnl.h>
  26 #include <linux/delay.h>
  27 #include <linux/device.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/module.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/pci.h>
  32 #include <linux/pkt_sched.h>
  33 #include <linux/types.h>
  34 #include <linux/bitmap.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/pkt_sched.h>
  37
  38 #define HNAE3_MOD_VERSION "1.0"
  39
  40 #define HNAE3_MIN_VECTOR_NUM    2 /* first one for misc, another for IO */
  41
  42 /* Device version */
  43 #define HNAE3_DEVICE_VERSION_V1   0x00020
  44 #define HNAE3_DEVICE_VERSION_V2   0x00021
  45 #define HNAE3_DEVICE_VERSION_V3   0x00030
  46
  47 #define HNAE3_PCI_REVISION_BIT_SIZE             8
  48
  49 /* Device IDs */
  50 #define HNAE3_DEV_ID_GE                         0xA220
  51 #define HNAE3_DEV_ID_25GE                       0xA221
  52 #define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  53 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  54 #define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  55 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  56 #define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  57 #define HNAE3_DEV_ID_200G_RDMA                  0xA228
  58 #define HNAE3_DEV_ID_VF                         0xA22E
  59 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF            0xA22F
  60
  61 #define HNAE3_CLASS_NAME_SIZE 16
  62
  63 #define HNAE3_DEV_INITED_B                      0x0
  64 #define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  65 #define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  66 #define HNAE3_KNIC_CLIENT_INITED_B              0x3
  67 #define HNAE3_UNIC_CLIENT_INITED_B              0x4
  68 #define HNAE3_ROCE_CLIENT_INITED_B              0x5
  69
  70 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) | \
  71                 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  72
  73 #define hnae3_dev_roce_supported(hdev) \
  74         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  75
  76 #define hnae3_dev_dcb_supported(hdev) \
  77         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  78
  79 enum HNAE3_DEV_CAP_BITS {
  80         HNAE3_DEV_SUPPORT_FD_B,
  81         HNAE3_DEV_SUPPORT_GRO_B,
  82         HNAE3_DEV_SUPPORT_FEC_B,
  83         HNAE3_DEV_SUPPORT_UDP_GSO_B,
  84         HNAE3_DEV_SUPPORT_QB_B,
  85         HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
  86         HNAE3_DEV_SUPPORT_PTP_B,
  87         HNAE3_DEV_SUPPORT_INT_QL_B,
  88         HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
  89         HNAE3_DEV_SUPPORT_TX_PUSH_B,
  90         HNAE3_DEV_SUPPORT_PHY_IMP_B,
  91         HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
  92         HNAE3_DEV_SUPPORT_HW_PAD_B,
  93         HNAE3_DEV_SUPPORT_STASH_B,
  94         HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
  95         HNAE3_DEV_SUPPORT_PAUSE_B,
  96         HNAE3_DEV_SUPPORT_RAS_IMP_B,
  97         HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
  98         HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
  99         HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
 100         HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
 101         HNAE3_DEV_SUPPORT_CQ_B,
 102         HNAE3_DEV_SUPPORT_FEC_STATS_B,
 103         HNAE3_DEV_SUPPORT_LANE_NUM_B,
 104         HNAE3_DEV_SUPPORT_WOL_B,
 105         HNAE3_DEV_SUPPORT_TM_FLUSH_B,
 106 };
 107
 108 #define hnae3_ae_dev_fd_supported(ae_dev) \
 109                 test_bit(HNAE3_DEV_SUPPORT_FD_B, (ae_dev)->caps)
 110
 111 #define hnae3_ae_dev_gro_supported(ae_dev) \
 112                 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (ae_dev)->caps)
 113
 114 #define hnae3_dev_fec_supported(hdev) \
 115         test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
 116
 117 #define hnae3_dev_udp_gso_supported(hdev) \
 118         test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
 119
 120 #define hnae3_dev_qb_supported(hdev) \
 121         test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
 122
 123 #define hnae3_dev_fd_forward_tc_supported(hdev) \
 124         test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
 125
 126 #define hnae3_dev_ptp_supported(hdev) \
 127         test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
 128
 129 #define hnae3_dev_int_ql_supported(hdev) \
 130         test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
 131
 132 #define hnae3_dev_hw_csum_supported(hdev) \
 133         test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
 134
 135 #define hnae3_dev_tx_push_supported(hdev) \
 136         test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
 137
 138 #define hnae3_dev_phy_imp_supported(hdev) \
 139         test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 140
 141 #define hnae3_dev_ras_imp_supported(hdev) \
 142         test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
 143
 144 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
 145         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 146
 147 #define hnae3_dev_hw_pad_supported(hdev) \
 148         test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
 149
 150 #define hnae3_dev_stash_supported(hdev) \
 151         test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
 152
 153 #define hnae3_dev_pause_supported(hdev) \
 154         test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
 155
 156 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
 157         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
 158
 159 #define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
 160         test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
 161
 162 #define hnae3_ae_dev_mc_mac_mng_supported(ae_dev) \
 163         test_bit(HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, (ae_dev)->caps)
 164
 165 #define hnae3_ae_dev_cq_supported(ae_dev) \
 166         test_bit(HNAE3_DEV_SUPPORT_CQ_B, (ae_dev)->caps)
 167
 168 #define hnae3_ae_dev_fec_stats_supported(ae_dev) \
 169         test_bit(HNAE3_DEV_SUPPORT_FEC_STATS_B, (ae_dev)->caps)
 170
 171 #define hnae3_ae_dev_lane_num_supported(ae_dev) \
 172         test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps)
 173
 174 #define hnae3_ae_dev_wol_supported(ae_dev) \
 175         test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps)
 176
 177 #define hnae3_ae_dev_tm_flush_supported(hdev) \
 178         test_bit(HNAE3_DEV_SUPPORT_TM_FLUSH_B, (hdev)->ae_dev->caps)
 179
 180 enum HNAE3_PF_CAP_BITS {
 181         HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
 182 };
 183 #define ring_ptr_move_fw(ring, p) \
 184         ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 185 #define ring_ptr_move_bw(ring, p) \
 186         ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 187
 188 struct hnae3_handle;
 189
 190 struct hnae3_queue {
 191         void __iomem *io_base;
 192         void __iomem *mem_base;
 193         struct hnae3_ae_algo *ae_algo;
 194         struct hnae3_handle *handle;
 195         int tqp_index;          /* index in a handle */
 196         u32 buf_size;           /* size for hnae_desc->addr, preset by AE */
 197         u16 tx_desc_num;        /* total number of tx desc */
 198         u16 rx_desc_num;        /* total number of rx desc */
 199 };
 200
 201 struct hns3_mac_stats {
 202         u64 tx_pause_cnt;
 203         u64 rx_pause_cnt;
 204 };
 205
 206 /* hnae3 loop mode */
 207 enum hnae3_loop {
 208         HNAE3_LOOP_EXTERNAL,
 209         HNAE3_LOOP_APP,
 210         HNAE3_LOOP_SERIAL_SERDES,
 211         HNAE3_LOOP_PARALLEL_SERDES,
 212         HNAE3_LOOP_PHY,
 213         HNAE3_LOOP_NONE,
 214 };
 215
 216 enum hnae3_client_type {
 217         HNAE3_CLIENT_KNIC,
 218         HNAE3_CLIENT_ROCE,
 219 };
 220
 221 /* mac media type */
 222 enum hnae3_media_type {
 223         HNAE3_MEDIA_TYPE_UNKNOWN,
 224         HNAE3_MEDIA_TYPE_FIBER,
 225         HNAE3_MEDIA_TYPE_COPPER,
 226         HNAE3_MEDIA_TYPE_BACKPLANE,
 227         HNAE3_MEDIA_TYPE_NONE,
 228 };
 229
 230 /* must be consistent with definition in firmware */
 231 enum hnae3_module_type {
 232         HNAE3_MODULE_TYPE_UNKNOWN       = 0x00,
 233         HNAE3_MODULE_TYPE_FIBRE_LR      = 0x01,
 234         HNAE3_MODULE_TYPE_FIBRE_SR      = 0x02,
 235         HNAE3_MODULE_TYPE_AOC           = 0x03,
 236         HNAE3_MODULE_TYPE_CR            = 0x04,
 237         HNAE3_MODULE_TYPE_KR            = 0x05,
 238         HNAE3_MODULE_TYPE_TP            = 0x06,
 239 };
 240
 241 enum hnae3_fec_mode {
 242         HNAE3_FEC_AUTO = 0,
 243         HNAE3_FEC_BASER,
 244         HNAE3_FEC_RS,
 245         HNAE3_FEC_LLRS,
 246         HNAE3_FEC_NONE,
 247         HNAE3_FEC_USER_DEF,
 248 };
 249
 250 enum hnae3_reset_notify_type {
 251         HNAE3_UP_CLIENT,
 252         HNAE3_DOWN_CLIENT,
 253         HNAE3_INIT_CLIENT,
 254         HNAE3_UNINIT_CLIENT,
 255 };
 256
 257 enum hnae3_hw_error_type {
 258         HNAE3_PPU_POISON_ERROR,
 259         HNAE3_CMDQ_ECC_ERROR,
 260         HNAE3_IMP_RD_POISON_ERROR,
 261         HNAE3_ROCEE_AXI_RESP_ERROR,
 262 };
 263
 264 enum hnae3_reset_type {
 265         HNAE3_VF_RESET,
 266         HNAE3_VF_FUNC_RESET,
 267         HNAE3_VF_PF_FUNC_RESET,
 268         HNAE3_VF_FULL_RESET,
 269         HNAE3_FLR_RESET,
 270         HNAE3_FUNC_RESET,
 271         HNAE3_GLOBAL_RESET,
 272         HNAE3_IMP_RESET,
 273         HNAE3_NONE_RESET,
 274         HNAE3_MAX_RESET,
 275 };
 276
 277 enum hnae3_port_base_vlan_state {
 278         HNAE3_PORT_BASE_VLAN_DISABLE,
 279         HNAE3_PORT_BASE_VLAN_ENABLE,
 280         HNAE3_PORT_BASE_VLAN_MODIFY,
 281         HNAE3_PORT_BASE_VLAN_NOCHANGE,
 282 };
 283
 284 enum hnae3_dbg_cmd {
 285         HNAE3_DBG_CMD_TM_NODES,
 286         HNAE3_DBG_CMD_TM_PRI,
 287         HNAE3_DBG_CMD_TM_QSET,
 288         HNAE3_DBG_CMD_TM_MAP,
 289         HNAE3_DBG_CMD_TM_PG,
 290         HNAE3_DBG_CMD_TM_PORT,
 291         HNAE3_DBG_CMD_TC_SCH_INFO,
 292         HNAE3_DBG_CMD_QOS_PAUSE_CFG,
 293         HNAE3_DBG_CMD_QOS_PRI_MAP,
 294         HNAE3_DBG_CMD_QOS_DSCP_MAP,
 295         HNAE3_DBG_CMD_QOS_BUF_CFG,
 296         HNAE3_DBG_CMD_DEV_INFO,
 297         HNAE3_DBG_CMD_TX_BD,
 298         HNAE3_DBG_CMD_RX_BD,
 299         HNAE3_DBG_CMD_MAC_UC,
 300         HNAE3_DBG_CMD_MAC_MC,
 301         HNAE3_DBG_CMD_MNG_TBL,
 302         HNAE3_DBG_CMD_LOOPBACK,
 303         HNAE3_DBG_CMD_PTP_INFO,
 304         HNAE3_DBG_CMD_INTERRUPT_INFO,
 305         HNAE3_DBG_CMD_RESET_INFO,
 306         HNAE3_DBG_CMD_IMP_INFO,
 307         HNAE3_DBG_CMD_NCL_CONFIG,
 308         HNAE3_DBG_CMD_REG_BIOS_COMMON,
 309         HNAE3_DBG_CMD_REG_SSU,
 310         HNAE3_DBG_CMD_REG_IGU_EGU,
 311         HNAE3_DBG_CMD_REG_RPU,
 312         HNAE3_DBG_CMD_REG_NCSI,
 313         HNAE3_DBG_CMD_REG_RTC,
 314         HNAE3_DBG_CMD_REG_PPP,
 315         HNAE3_DBG_CMD_REG_RCB,
 316         HNAE3_DBG_CMD_REG_TQP,
 317         HNAE3_DBG_CMD_REG_MAC,
 318         HNAE3_DBG_CMD_REG_DCB,
 319         HNAE3_DBG_CMD_VLAN_CONFIG,
 320         HNAE3_DBG_CMD_QUEUE_MAP,
 321         HNAE3_DBG_CMD_RX_QUEUE_INFO,
 322         HNAE3_DBG_CMD_TX_QUEUE_INFO,
 323         HNAE3_DBG_CMD_FD_TCAM,
 324         HNAE3_DBG_CMD_FD_COUNTER,
 325         HNAE3_DBG_CMD_MAC_TNL_STATUS,
 326         HNAE3_DBG_CMD_SERV_INFO,
 327         HNAE3_DBG_CMD_UMV_INFO,
 328         HNAE3_DBG_CMD_PAGE_POOL_INFO,
 329         HNAE3_DBG_CMD_COAL_INFO,
 330         HNAE3_DBG_CMD_UNKNOWN,
 331 };
 332
 333 enum hnae3_tc_map_mode {
 334         HNAE3_TC_MAP_MODE_PRIO,
 335         HNAE3_TC_MAP_MODE_DSCP,
 336 };
 337
 338 struct hnae3_vector_info {
 339         u8 __iomem *io_addr;
 340         int vector;
 341 };
 342
 343 #define HNAE3_RING_TYPE_B 0
 344 #define HNAE3_RING_TYPE_TX 0
 345 #define HNAE3_RING_TYPE_RX 1
 346 #define HNAE3_RING_GL_IDX_S 0
 347 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
 348 #define HNAE3_RING_GL_RX 0
 349 #define HNAE3_RING_GL_TX 1
 350
 351 #define HNAE3_FW_VERSION_BYTE3_SHIFT    24
 352 #define HNAE3_FW_VERSION_BYTE3_MASK     GENMASK(31, 24)
 353 #define HNAE3_FW_VERSION_BYTE2_SHIFT    16
 354 #define HNAE3_FW_VERSION_BYTE2_MASK     GENMASK(23, 16)
 355 #define HNAE3_FW_VERSION_BYTE1_SHIFT    8
 356 #define HNAE3_FW_VERSION_BYTE1_MASK     GENMASK(15, 8)
 357 #define HNAE3_FW_VERSION_BYTE0_SHIFT    0
 358 #define HNAE3_FW_VERSION_BYTE0_MASK     GENMASK(7, 0)
 359
 360 struct hnae3_ring_chain_node {
 361         struct hnae3_ring_chain_node *next;
 362         u32 tqp_index;
 363         u32 flag;
 364         u32 int_gl_idx;
 365 };
 366
 367 #define HNAE3_IS_TX_RING(node) \
 368         (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
 369
 370 /* device specification info from firmware */
 371 struct hnae3_dev_specs {
 372         u32 mac_entry_num; /* number of mac-vlan table entry */
 373         u32 mng_entry_num; /* number of manager table entry */
 374         u32 max_tm_rate;
 375         u16 rss_ind_tbl_size;
 376         u16 rss_key_size;
 377         u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
 378         u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
 379         u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 380         u16 max_frm_size;
 381         u16 max_qset_num;
 382         u16 umv_size;
 383         u16 mc_mac_size;
 384         u32 mac_stats_num;
 385         u8 tnl_num;
 386 };
 387
 388 struct hnae3_client_ops {
 389         int (*init_instance)(struct hnae3_handle *handle);
 390         void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 391         void (*link_status_change)(struct hnae3_handle *handle, bool state);
 392         int (*reset_notify)(struct hnae3_handle *handle,
 393                             enum hnae3_reset_notify_type type);
 394         void (*process_hw_error)(struct hnae3_handle *handle,
 395                                  enum hnae3_hw_error_type);
 396 };
 397
 398 #define HNAE3_CLIENT_NAME_LENGTH 16
 399 struct hnae3_client {
 400         char name[HNAE3_CLIENT_NAME_LENGTH];
 401         unsigned long state;
 402         enum hnae3_client_type type;
 403         const struct hnae3_client_ops *ops;
 404         struct list_head node;
 405 };
 406
 407 #define HNAE3_DEV_CAPS_MAX_NUM  96
 408 struct hnae3_ae_dev {
 409         struct pci_dev *pdev;
 410         const struct hnae3_ae_ops *ops;
 411         struct list_head node;
 412         u32 flag;
 413         unsigned long hw_err_reset_req;
 414         struct hnae3_dev_specs dev_specs;
 415         u32 dev_version;
 416         DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM);
 417         void *priv;
 418 };
 419
 420 /* This struct defines the operation on the handle.
 421  *
 422  * init_ae_dev(): (mandatory)
 423  *   Get PF configure from pci_dev and initialize PF hardware
 424  * uninit_ae_dev()
 425  *   Disable PF device and release PF resource
 426  * register_client
 427  *   Register client to ae_dev
 428  * unregister_client()
 429  *   Unregister client from ae_dev
 430  * start()
 431  *   Enable the hardware
 432  * stop()
 433  *   Disable the hardware
 434  * start_client()
 435  *   Inform the hclge that client has been started
 436  * stop_client()
 437  *   Inform the hclge that client has been stopped
 438  * get_status()
 439  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 440  *   non-ok
 441  * get_ksettings_an_result()
 442  *   Get negotiation status,speed and duplex
 443  * get_media_type()
 444  *   Get media type of MAC
 445  * check_port_speed()
 446  *   Check target speed whether is supported
 447  * adjust_link()
 448  *   Adjust link status
 449  * set_loopback()
 450  *   Set loopback
 451  * set_promisc_mode
 452  *   Set promisc mode
 453  * request_update_promisc_mode
 454  *   request to hclge(vf) to update promisc mode
 455  * set_mtu()
 456  *   set mtu
 457  * get_pauseparam()
 458  *   get tx and rx of pause frame use
 459  * set_pauseparam()
 460  *   set tx and rx of pause frame use
 461  * set_autoneg()
 462  *   set auto autonegotiation of pause frame use
 463  * get_autoneg()
 464  *   get auto autonegotiation of pause frame use
 465  * restart_autoneg()
 466  *   restart autonegotiation
 467  * halt_autoneg()
 468  *   halt/resume autonegotiation when autonegotiation on
 469  * get_coalesce_usecs()
 470  *   get usecs to delay a TX interrupt after a packet is sent
 471  * get_rx_max_coalesced_frames()
 472  *   get Maximum number of packets to be sent before a TX interrupt.
 473  * set_coalesce_usecs()
 474  *   set usecs to delay a TX interrupt after a packet is sent
 475  * set_coalesce_frames()
 476  *   set Maximum number of packets to be sent before a TX interrupt.
 477  * get_mac_addr()
 478  *   get mac address
 479  * set_mac_addr()
 480  *   set mac address
 481  * add_uc_addr
 482  *   Add unicast addr to mac table
 483  * rm_uc_addr
 484  *   Remove unicast addr from mac table
 485  * set_mc_addr()
 486  *   Set multicast address
 487  * add_mc_addr
 488  *   Add multicast address to mac table
 489  * rm_mc_addr
 490  *   Remove multicast address from mac table
 491  * update_stats()
 492  *   Update Old network device statistics
 493  * get_mac_stats()
 494  *   get mac pause statistics including tx_cnt and rx_cnt
 495  * get_ethtool_stats()
 496  *   Get ethtool network device statistics
 497  * get_strings()
 498  *   Get a set of strings that describe the requested objects
 499  * get_sset_count()
 500  *   Get number of strings that @get_strings will write
 501  * update_led_status()
 502  *   Update the led status
 503  * set_led_id()
 504  *   Set led id
 505  * get_regs()
 506  *   Get regs dump
 507  * get_regs_len()
 508  *   Get the len of the regs dump
 509  * get_rss_key_size()
 510  *   Get rss key size
 511  * get_rss()
 512  *   Get rss table
 513  * set_rss()
 514  *   Set rss table
 515  * get_tc_size()
 516  *   Get tc size of handle
 517  * get_vector()
 518  *   Get vector number and vector information
 519  * put_vector()
 520  *   Put the vector in hdev
 521  * map_ring_to_vector()
 522  *   Map rings to vector
 523  * unmap_ring_from_vector()
 524  *   Unmap rings from vector
 525  * reset_queue()
 526  *   Reset queue
 527  * get_fw_version()
 528  *   Get firmware version
 529  * get_mdix_mode()
 530  *   Get media typr of phy
 531  * enable_vlan_filter()
 532  *   Enable vlan filter
 533  * set_vlan_filter()
 534  *   Set vlan filter config of Ports
 535  * set_vf_vlan_filter()
 536  *   Set vlan filter config of vf
 537  * enable_hw_strip_rxvtag()
 538  *   Enable/disable hardware strip vlan tag of packets received
 539  * set_gro_en
 540  *   Enable/disable HW GRO
 541  * add_arfs_entry
 542  *   Check the 5-tuples of flow, and create flow director rule
 543  * get_vf_config
 544  *   Get the VF configuration setting by the host
 545  * set_vf_link_state
 546  *   Set VF link status
 547  * set_vf_spoofchk
 548  *   Enable/disable spoof check for specified vf
 549  * set_vf_trust
 550  *   Enable/disable trust for specified vf, if the vf being trusted, then
 551  *   it can enable promisc mode
 552  * set_vf_rate
 553  *   Set the max tx rate of specified vf.
 554  * set_vf_mac
 555  *   Configure the default MAC for specified VF
 556  * get_module_eeprom
 557  *   Get the optical module eeprom info.
 558  * add_cls_flower
 559  *   Add clsflower rule
 560  * del_cls_flower
 561  *   Delete clsflower rule
 562  * cls_flower_active
 563  *   Check if any cls flower rule exist
 564  * dbg_read_cmd
 565  *   Execute debugfs read command.
 566  * set_tx_hwts_info
 567  *   Save information for 1588 tx packet
 568  * get_rx_hwts
 569  *   Get 1588 rx hwstamp
 570  * get_ts_info
 571  *   Get phc info
 572  * clean_vf_config
 573  *   Clean residual vf info after disable sriov
 574  * get_wol
 575  *   Get wake on lan info
 576  * set_wol
 577  *   Config wake on lan
 578  */
 579 struct hnae3_ae_ops {
 580         int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 581         void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 582         void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
 583                               enum hnae3_reset_type rst_type);
 584         void (*reset_done)(struct hnae3_ae_dev *ae_dev);
 585         int (*init_client_instance)(struct hnae3_client *client,
 586                                     struct hnae3_ae_dev *ae_dev);
 587         void (*uninit_client_instance)(struct hnae3_client *client,
 588                                        struct hnae3_ae_dev *ae_dev);
 589         int (*start)(struct hnae3_handle *handle);
 590         void (*stop)(struct hnae3_handle *handle);
 591         int (*client_start)(struct hnae3_handle *handle);
 592         void (*client_stop)(struct hnae3_handle *handle);
 593         int (*get_status)(struct hnae3_handle *handle);
 594         void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 595                                         u8 *auto_neg, u32 *speed, u8 *duplex,
 596                                         u32 *lane_num);
 597
 598         int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 599                                    u8 duplex, u8 lane_num);
 600
 601         void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
 602                                u8 *module_type);
 603         int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
 604         void (*get_fec_stats)(struct hnae3_handle *handle,
 605                               struct ethtool_fec_stats *fec_stats);
 606         void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
 607                         u8 *fec_mode);
 608         int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
 609         void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 610         int (*set_loopback)(struct hnae3_handle *handle,
 611                             enum hnae3_loop loop_mode, bool en);
 612
 613         int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
 614                                 bool en_mc_pmc);
 615         void (*request_update_promisc_mode)(struct hnae3_handle *handle);
 616         int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 617
 618         void (*get_pauseparam)(struct hnae3_handle *handle,
 619                                u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 620         int (*set_pauseparam)(struct hnae3_handle *handle,
 621                               u32 auto_neg, u32 rx_en, u32 tx_en);
 622
 623         int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 624         int (*get_autoneg)(struct hnae3_handle *handle);
 625         int (*restart_autoneg)(struct hnae3_handle *handle);
 626         int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
 627
 628         void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 629                                    u32 *tx_usecs, u32 *rx_usecs);
 630         void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 631                                             u32 *tx_frames, u32 *rx_frames);
 632         int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 633         int (*set_coalesce_frames)(struct hnae3_handle *handle,
 634                                    u32 coalesce_frames);
 635         void (*get_coalesce_range)(struct hnae3_handle *handle,
 636                                    u32 *tx_frames_low, u32 *rx_frames_low,
 637                                    u32 *tx_frames_high, u32 *rx_frames_high,
 638                                    u32 *tx_usecs_low, u32 *rx_usecs_low,
 639                                    u32 *tx_usecs_high, u32 *rx_usecs_high);
 640
 641         void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 642         int (*set_mac_addr)(struct hnae3_handle *handle, const void *p,
 643                             bool is_first);
 644         int (*do_ioctl)(struct hnae3_handle *handle,
 645                         struct ifreq *ifr, int cmd);
 646         int (*add_uc_addr)(struct hnae3_handle *handle,
 647                            const unsigned char *addr);
 648         int (*rm_uc_addr)(struct hnae3_handle *handle,
 649                           const unsigned char *addr);
 650         int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 651         int (*add_mc_addr)(struct hnae3_handle *handle,
 652                            const unsigned char *addr);
 653         int (*rm_mc_addr)(struct hnae3_handle *handle,
 654                           const unsigned char *addr);
 655         void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 656         void (*update_stats)(struct hnae3_handle *handle);
 657         void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 658         void (*get_mac_stats)(struct hnae3_handle *handle,
 659                               struct hns3_mac_stats *mac_stats);
 660         void (*get_strings)(struct hnae3_handle *handle,
 661                             u32 stringset, u8 *data);
 662         int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 663
 664         void (*get_regs)(struct hnae3_handle *handle, u32 *version,
 665                          void *data);
 666         int (*get_regs_len)(struct hnae3_handle *handle);
 667
 668         u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 669         int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 670                        u8 *hfunc);
 671         int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 672                        const u8 *key, const u8 hfunc);
 673         int (*set_rss_tuple)(struct hnae3_handle *handle,
 674                              struct ethtool_rxnfc *cmd);
 675         int (*get_rss_tuple)(struct hnae3_handle *handle,
 676                              struct ethtool_rxnfc *cmd);
 677
 678         int (*get_tc_size)(struct hnae3_handle *handle);
 679
 680         int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 681                           struct hnae3_vector_info *vector_info);
 682         int (*put_vector)(struct hnae3_handle *handle, int vector_num);
 683         int (*map_ring_to_vector)(struct hnae3_handle *handle,
 684                                   int vector_num,
 685                                   struct hnae3_ring_chain_node *vr_chain);
 686         int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 687                                       int vector_num,
 688                                       struct hnae3_ring_chain_node *vr_chain);
 689
 690         int (*reset_queue)(struct hnae3_handle *handle);
 691         u32 (*get_fw_version)(struct hnae3_handle *handle);
 692         void (*get_mdix_mode)(struct hnae3_handle *handle,
 693                               u8 *tp_mdix_ctrl, u8 *tp_mdix);
 694
 695         int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
 696         int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 697                                u16 vlan_id, bool is_kill);
 698         int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 699                                   u16 vlan, u8 qos, __be16 proto);
 700         int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
 701         void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
 702         enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
 703                                                  unsigned long *addr);
 704         void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
 705                                           enum hnae3_reset_type rst_type);
 706         void (*get_channels)(struct hnae3_handle *handle,
 707                              struct ethtool_channels *ch);
 708         void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
 709                                       u16 *alloc_tqps, u16 *max_rss_size);
 710         int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
 711                             bool rxfh_configured);
 712         void (*get_flowctrl_adv)(struct hnae3_handle *handle,
 713                                  u32 *flowctrl_adv);
 714         int (*set_led_id)(struct hnae3_handle *handle,
 715                           enum ethtool_phys_id_state status);
 716         void (*get_link_mode)(struct hnae3_handle *handle,
 717                               unsigned long *supported,
 718                               unsigned long *advertising);
 719         int (*add_fd_entry)(struct hnae3_handle *handle,
 720                             struct ethtool_rxnfc *cmd);
 721         int (*del_fd_entry)(struct hnae3_handle *handle,
 722                             struct ethtool_rxnfc *cmd);
 723         int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
 724                                struct ethtool_rxnfc *cmd);
 725         int (*get_fd_rule_info)(struct hnae3_handle *handle,
 726                                 struct ethtool_rxnfc *cmd);
 727         int (*get_fd_all_rules)(struct hnae3_handle *handle,
 728                                 struct ethtool_rxnfc *cmd, u32 *rule_locs);
 729         void (*enable_fd)(struct hnae3_handle *handle, bool enable);
 730         int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
 731                               u16 flow_id, struct flow_keys *fkeys);
 732         int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
 733                             char *buf, int len);
 734         pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
 735         bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
 736         bool (*ae_dev_resetting)(struct hnae3_handle *handle);
 737         unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 738         int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
 739         u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
 740         void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
 741         int (*mac_connect_phy)(struct hnae3_handle *handle);
 742         void (*mac_disconnect_phy)(struct hnae3_handle *handle);
 743         int (*get_vf_config)(struct hnae3_handle *handle, int vf,
 744                              struct ifla_vf_info *ivf);
 745         int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
 746                                  int link_state);
 747         int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
 748                                bool enable);
 749         int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
 750         int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
 751                            int min_tx_rate, int max_tx_rate, bool force);
 752         int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
 753         int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
 754                                  u32 len, u8 *data);
 755         bool (*get_cmdq_stat)(struct hnae3_handle *handle);
 756         int (*add_cls_flower)(struct hnae3_handle *handle,
 757                               struct flow_cls_offload *cls_flower, int tc);
 758         int (*del_cls_flower)(struct hnae3_handle *handle,
 759                               struct flow_cls_offload *cls_flower);
 760         bool (*cls_flower_active)(struct hnae3_handle *handle);
 761         int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
 762                                       struct ethtool_link_ksettings *cmd);
 763         int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
 764                                       const struct ethtool_link_ksettings *cmd);
 765         bool (*set_tx_hwts_info)(struct hnae3_handle *handle,
 766                                  struct sk_buff *skb);
 767         void (*get_rx_hwts)(struct hnae3_handle *handle, struct sk_buff *skb,
 768                             u32 nsec, u32 sec);
 769         int (*get_ts_info)(struct hnae3_handle *handle,
 770                            struct ethtool_ts_info *info);
 771         int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
 772                                        u32 *status_code);
 773         void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);
 774         int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp,
 775                              u8 *tc_map_mode, u8 *priority);
 776         void (*get_wol)(struct hnae3_handle *handle,
 777                         struct ethtool_wolinfo *wol);
 778         int (*set_wol)(struct hnae3_handle *handle,
 779                        struct ethtool_wolinfo *wol);
 780 };
 781
 782 struct hnae3_dcb_ops {
 783         /* IEEE 802.1Qaz std */
 784         int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 785         int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 786         int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 787         int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 788         int (*ieee_setapp)(struct hnae3_handle *h, struct dcb_app *app);
 789         int (*ieee_delapp)(struct hnae3_handle *h, struct dcb_app *app);
 790
 791         /* DCBX configuration */
 792         u8   (*getdcbx)(struct hnae3_handle *);
 793         u8   (*setdcbx)(struct hnae3_handle *, u8);
 794
 795         int (*setup_tc)(struct hnae3_handle *handle,
 796                         struct tc_mqprio_qopt_offload *mqprio_qopt);
 797 };
 798
 799 struct hnae3_ae_algo {
 800         const struct hnae3_ae_ops *ops;
 801         struct list_head node;
 802         const struct pci_device_id *pdev_id_table;
 803 };
 804
 805 #define HNAE3_INT_NAME_LEN        32
 806 #define HNAE3_ITR_COUNTDOWN_START 100
 807
 808 #define HNAE3_MAX_TC            8
 809 #define HNAE3_MAX_USER_PRIO     8
 810 struct hnae3_tc_info {
 811         u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
 812         u16 tqp_count[HNAE3_MAX_TC];
 813         u16 tqp_offset[HNAE3_MAX_TC];
 814         u8 max_tc; /* Total number of TCs */
 815         u8 num_tc; /* Total number of enabled TCs */
 816         bool mqprio_active;
 817         bool dcb_ets_active;
 818 };
 819
 820 #define HNAE3_MAX_DSCP                  64
 821 #define HNAE3_PRIO_ID_INVALID           0xff
 822 struct hnae3_knic_private_info {
 823         struct net_device *netdev; /* Set by KNIC client when init instance */
 824         u16 rss_size;              /* Allocated RSS queues */
 825         u16 req_rss_size;
 826         u16 rx_buf_len;
 827         u16 num_tx_desc;
 828         u16 num_rx_desc;
 829         u32 tx_spare_buf_size;
 830
 831         struct hnae3_tc_info tc_info;
 832         u8 tc_map_mode;
 833         u8 dscp_app_cnt;
 834         u8 dscp_prio[HNAE3_MAX_DSCP];
 835
 836         u16 num_tqps;             /* total number of TQPs in this handle */
 837         struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 838         const struct hnae3_dcb_ops *dcb_ops;
 839
 840         u16 int_rl_setting;
 841         void __iomem *io_base;
 842 };
 843
 844 struct hnae3_roce_private_info {
 845         struct net_device *netdev;
 846         void __iomem *roce_io_base;
 847         void __iomem *roce_mem_base;
 848         int base_vector;
 849         int num_vectors;
 850
 851         /* The below attributes defined for RoCE client, hnae3 gives
 852          * initial values to them, and RoCE client can modify and use
 853          * them.
 854          */
 855         unsigned long reset_state;
 856         unsigned long instance_state;
 857         unsigned long state;
 858 };
 859
 860 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
 861 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 862 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK    BIT(2)
 863 #define HNAE3_SUPPORT_VF              BIT(3)
 864 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK  BIT(4)
 865 #define HNAE3_SUPPORT_EXTERNAL_LOOPBACK BIT(5)
 866
 867 #define HNAE3_USER_UPE          BIT(0)  /* unicast promisc enabled by user */
 868 #define HNAE3_USER_MPE          BIT(1)  /* mulitcast promisc enabled by user */
 869 #define HNAE3_BPE               BIT(2)  /* broadcast promisc enable */
 870 #define HNAE3_OVERFLOW_UPE      BIT(3)  /* unicast mac vlan overflow */
 871 #define HNAE3_OVERFLOW_MPE      BIT(4)  /* multicast mac vlan overflow */
 872 #define HNAE3_UPE               (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
 873 #define HNAE3_MPE               (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
 874
 875 enum hnae3_pflag {
 876         HNAE3_PFLAG_LIMIT_PROMISC,
 877         HNAE3_PFLAG_MAX
 878 };
 879
 880 struct hnae3_handle {
 881         struct hnae3_client *client;
 882         struct pci_dev *pdev;
 883         void *priv;
 884         struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 885         u64 flags; /* Indicate the capabilities for this handle */
 886
 887         union {
 888                 struct net_device *netdev; /* first member */
 889                 struct hnae3_knic_private_info kinfo;
 890                 struct hnae3_roce_private_info rinfo;
 891         };
 892
 893         u32 numa_node_mask;     /* for multi-chip support */
 894
 895         enum hnae3_port_base_vlan_state port_base_vlan_state;
 896
 897         u8 netdev_flags;
 898         struct dentry *hnae3_dbgfs;
 899         /* protects concurrent contention between debugfs commands */
 900         struct mutex dbgfs_lock;
 901         char **dbgfs_buf;
 902
 903         /* Network interface message level enabled bits */
 904         u32 msg_enable;
 905
 906         unsigned long supported_pflags;
 907         unsigned long priv_flags;
 908 };
 909
 910 #define hnae3_set_field(origin, mask, shift, val) \
 911         do { \
 912                 (origin) &= (~(mask)); \
 913                 (origin) |= ((val) << (shift)) & (mask); \
 914         } while (0)
 915 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 916
 917 #define hnae3_set_bit(origin, shift, val) \
 918         hnae3_set_field(origin, 0x1 << (shift), shift, val)
 919 #define hnae3_get_bit(origin, shift) \
 920         hnae3_get_field(origin, 0x1 << (shift), shift)
 921
 922 #define HNAE3_FORMAT_MAC_ADDR_LEN       18
 923 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_0  0
 924 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_4  4
 925 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_5  5
 926
 927 static inline void hnae3_format_mac_addr(char *format_mac_addr,
 928                                          const u8 *mac_addr)
 929 {
 930         snprintf(format_mac_addr, HNAE3_FORMAT_MAC_ADDR_LEN, "%02x:**:**:**:%02x:%02x",
 931                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_0],
 932                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_4],
 933                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_5]);
 934 }
 935
 936 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 937 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 938
 939 void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo);
 940 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 941 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 942
 943 void hnae3_unregister_client(struct hnae3_client *client);
 944 int hnae3_register_client(struct hnae3_client *client);
 945
 946 void hnae3_set_client_init_flag(struct hnae3_client *client,
 947                                 struct hnae3_ae_dev *ae_dev,
 948                                 unsigned int inited);
 949 #endif