1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * BPF JIT compiler for LoongArch
5 * Copyright (C) 2022 Loongson Technology Corporation Limited
8 #include <linux/filter.h>
9 #include <asm/cacheflush.h>
13 const struct bpf_prog *prog;
16 unsigned int epilogue_offset;
18 union loongarch_instruction *image;
23 struct bpf_binary_header *header;
28 #define emit_insn(ctx, func, ...) \
30 if (ctx->image != NULL) { \
31 union loongarch_instruction *insn = &ctx->image[ctx->idx]; \
32 emit_##func(insn, ##__VA_ARGS__); \
37 #define is_signed_imm12(val) signed_imm_check(val, 12)
38 #define is_signed_imm14(val) signed_imm_check(val, 14)
39 #define is_signed_imm16(val) signed_imm_check(val, 16)
40 #define is_signed_imm26(val) signed_imm_check(val, 26)
41 #define is_signed_imm32(val) signed_imm_check(val, 32)
42 #define is_signed_imm52(val) signed_imm_check(val, 52)
43 #define is_unsigned_imm12(val) unsigned_imm_check(val, 12)
45 static inline int bpf2la_offset(int bpf_insn, int off, const struct jit_ctx *ctx)
47 /* BPF JMP offset is relative to the next instruction */
50 * Whereas LoongArch branch instructions encode the offset
51 * from the branch itself, so we must subtract 1 from the
54 return (ctx->offset[bpf_insn + off] - (ctx->offset[bpf_insn] - 1));
57 static inline int epilogue_offset(const struct jit_ctx *ctx)
60 int to = ctx->epilogue_offset;
65 /* Zero-extend 32 bits into 64 bits */
66 static inline void emit_zext_32(struct jit_ctx *ctx, enum loongarch_gpr reg, bool is32)
71 emit_insn(ctx, lu32id, reg, 0);
74 /* Signed-extend 32 bits into 64 bits */
75 static inline void emit_sext_32(struct jit_ctx *ctx, enum loongarch_gpr reg, bool is32)
80 emit_insn(ctx, addiw, reg, reg, 0);
83 static inline void move_imm(struct jit_ctx *ctx, enum loongarch_gpr rd, long imm, bool is32)
85 long imm_11_0, imm_31_12, imm_51_32, imm_63_52, imm_51_0, imm_51_31;
87 /* or rd, $zero, $zero */
89 emit_insn(ctx, or, rd, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_ZERO);
93 /* addiw rd, $zero, imm_11_0 */
94 if (is_signed_imm12(imm)) {
95 emit_insn(ctx, addiw, rd, LOONGARCH_GPR_ZERO, imm);
99 /* ori rd, $zero, imm_11_0 */
100 if (is_unsigned_imm12(imm)) {
101 emit_insn(ctx, ori, rd, LOONGARCH_GPR_ZERO, imm);
105 /* lu52id rd, $zero, imm_63_52 */
106 imm_63_52 = (imm >> 52) & 0xfff;
107 imm_51_0 = imm & 0xfffffffffffff;
108 if (imm_63_52 != 0 && imm_51_0 == 0) {
109 emit_insn(ctx, lu52id, rd, LOONGARCH_GPR_ZERO, imm_63_52);
113 /* lu12iw rd, imm_31_12 */
114 imm_31_12 = (imm >> 12) & 0xfffff;
115 emit_insn(ctx, lu12iw, rd, imm_31_12);
117 /* ori rd, rd, imm_11_0 */
118 imm_11_0 = imm & 0xfff;
120 emit_insn(ctx, ori, rd, rd, imm_11_0);
122 if (!is_signed_imm32(imm)) {
125 * If bit[51:31] is all 0 or all 1,
126 * it means bit[51:32] is sign extended by lu12iw,
127 * no need to call lu32id to do a new filled operation.
129 imm_51_31 = (imm >> 31) & 0x1fffff;
130 if (imm_51_31 != 0 || imm_51_31 != 0x1fffff) {
131 /* lu32id rd, imm_51_32 */
132 imm_51_32 = (imm >> 32) & 0xfffff;
133 emit_insn(ctx, lu32id, rd, imm_51_32);
137 /* lu52id rd, rd, imm_63_52 */
138 if (!is_signed_imm52(imm))
139 emit_insn(ctx, lu52id, rd, rd, imm_63_52);
143 emit_zext_32(ctx, rd, is32);
146 static inline void move_reg(struct jit_ctx *ctx, enum loongarch_gpr rd,
147 enum loongarch_gpr rj)
149 emit_insn(ctx, or, rd, rj, LOONGARCH_GPR_ZERO);
152 static inline int invert_jmp_cond(u8 cond)
180 static inline void cond_jmp_offset(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj,
181 enum loongarch_gpr rd, int jmp_offset)
185 /* PC += jmp_offset if rj == rd */
186 emit_insn(ctx, beq, rj, rd, jmp_offset);
190 /* PC += jmp_offset if rj != rd */
191 emit_insn(ctx, bne, rj, rd, jmp_offset);
194 /* PC += jmp_offset if rj > rd (unsigned) */
195 emit_insn(ctx, bltu, rd, rj, jmp_offset);
198 /* PC += jmp_offset if rj < rd (unsigned) */
199 emit_insn(ctx, bltu, rj, rd, jmp_offset);
202 /* PC += jmp_offset if rj >= rd (unsigned) */
203 emit_insn(ctx, bgeu, rj, rd, jmp_offset);
206 /* PC += jmp_offset if rj <= rd (unsigned) */
207 emit_insn(ctx, bgeu, rd, rj, jmp_offset);
210 /* PC += jmp_offset if rj > rd (signed) */
211 emit_insn(ctx, blt, rd, rj, jmp_offset);
214 /* PC += jmp_offset if rj < rd (signed) */
215 emit_insn(ctx, blt, rj, rd, jmp_offset);
218 /* PC += jmp_offset if rj >= rd (signed) */
219 emit_insn(ctx, bge, rj, rd, jmp_offset);
222 /* PC += jmp_offset if rj <= rd (signed) */
223 emit_insn(ctx, bge, rd, rj, jmp_offset);
228 static inline void cond_jmp_offs26(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj,
229 enum loongarch_gpr rd, int jmp_offset)
231 cond = invert_jmp_cond(cond);
232 cond_jmp_offset(ctx, cond, rj, rd, 2);
233 emit_insn(ctx, b, jmp_offset);
236 static inline void uncond_jmp_offs26(struct jit_ctx *ctx, int jmp_offset)
238 emit_insn(ctx, b, jmp_offset);
241 static inline int emit_cond_jmp(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj,
242 enum loongarch_gpr rd, int jmp_offset)
245 * A large PC-relative jump offset may overflow the immediate field of
246 * the native conditional branch instruction, triggering a conversion
247 * to use an absolute jump instead, this jump sequence is particularly
248 * nasty. For now, use cond_jmp_offs26() directly to keep it simple.
249 * In the future, maybe we can add support for far branching, the branch
250 * relaxation requires more than two passes to converge, the code seems
251 * too complex to understand, not quite sure whether it is necessary and
252 * worth the extra pain. Anyway, just leave it as it is to enhance code
255 if (is_signed_imm26(jmp_offset)) {
256 cond_jmp_offs26(ctx, cond, rj, rd, jmp_offset);
263 static inline int emit_uncond_jmp(struct jit_ctx *ctx, int jmp_offset)
265 if (is_signed_imm26(jmp_offset)) {
266 uncond_jmp_offs26(ctx, jmp_offset);
273 static inline int emit_tailcall_jmp(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj,
274 enum loongarch_gpr rd, int jmp_offset)
276 if (is_signed_imm16(jmp_offset)) {
277 cond_jmp_offset(ctx, cond, rj, rd, jmp_offset);