Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ASPEED AST2500 Pin Controller
   8
   9 maintainers:
  10   - Andrew Jeffery <andrew@aj.id.au>
  11
  12 description: |+
  13   The pin controller node should be the child of a syscon node with the
  14   required property:
  15
  16   - compatible:         Should be one of the following:
  17                         "aspeed,ast2500-scu", "syscon", "simple-mfd"
  18                         "aspeed,g5-scu", "syscon", "simple-mfd"
  19
  20   Refer to the bindings described in
  21   Documentation/devicetree/bindings/mfd/syscon.yaml
  22
  23 properties:
  24   compatible:
  25     const: aspeed,ast2500-pinctrl
  26   reg:
  27     maxItems: 2
  28
  29   aspeed,external-nodes:
  30     minItems: 2
  31     maxItems: 2
  32     items:
  33       maxItems: 1
  34     $ref: /schemas/types.yaml#/definitions/phandle-array
  35     description: |
  36       A cell of phandles to external controller nodes:
  37       0: compatible with "aspeed,ast2500-gfx", "syscon"
  38       1: compatible with "aspeed,ast2500-lhc", "syscon"
  39
  40 patternProperties:
  41   '^.*$':
  42     if:
  43       type: object
  44     then:
  45       patternProperties:
  46         "^function|groups$":
  47           $ref: "/schemas/types.yaml#/definitions/string"
  48           enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
  49                   ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
  50                   ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,
  51                   GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5,
  52                   I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC,
  53                   LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK,
  54                   MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,
  55                   NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2,
  56                   NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0,
  57                   PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
  58                   RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13,
  59                   SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1,
  60                   SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO,
  61                   SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG,
  62                   SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3,
  63                   TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6,
  64                   USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS,
  65                   VGAVS, VPI24, VPO, WDTRST1, WDTRST2]
  66
  67 allOf:
  68   - $ref: "pinctrl.yaml#"
  69
  70 required:
  71   - compatible
  72   - aspeed,external-nodes
  73
  74 additionalProperties: false
  75
  76 examples:
  77   - |
  78     #include <dt-bindings/clock/aspeed-clock.h>
  79     scu@1e6e2000 {
  80         compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
  81         reg = <0x1e6e2000 0x1a8>;
  82         #clock-cells = <1>;
  83         #reset-cells = <1>;
  84
  85         pinctrl: pinctrl {
  86             compatible = "aspeed,ast2500-pinctrl";
  87             aspeed,external-nodes = <&gfx>, <&lhc>;
  88
  89             pinctrl_i2c3_default: i2c3_default {
  90                 function = "I2C3";
  91                 groups = "I2C3";
  92             };
  93
  94             pinctrl_gpioh0_unbiased_default: gpioh0 {
  95                 pins = "A18";
  96                 bias-disable;
  97             };
  98         };
  99     };