drm/i915/mst: update slot information for 128b/132b
authorJani Nikula <jani.nikula@intel.com>
Tue, 8 Feb 2022 15:23:17 +0000 (17:23 +0200)
committerJani Nikula <jani.nikula@intel.com>
Fri, 11 Feb 2022 09:35:37 +0000 (11:35 +0200)
commit420f63cb6d2a691b94662f50e07dc3c9a851bc69
tree6e88069d8e00e586be5695875872c02a2a297758
parent3ee7fab0f3d2c1f9c2bfe6d4fb8c58106a52e840
drm/i915/mst: update slot information for 128b/132b

128b/132b supports using 64 slots starting from 0, while 8b/10b reserves
slot 0 for metadata.

Commit d6c6a76f80a1 ("drm: Update MST First Link Slot Information Based
on Encoding Format") added support for updating the topology state
accordingly, and commit 41724ea273cd ("drm/amd/display: Add DP 2.0 MST
DM Support") started using it in the amd driver.

This feels more than a little cumbersome, especially updating the
information in atomic check. For i915, add the update to MST connector
.compute_config hook rather than iterating over all MST managers and
connectors in global mode config .atomic_check. Fingers crossed.

v3:
- Propagate errors from intel_dp_mst_update_slots() (Ville)

v2:
- Update in .compute_config() not .atomic_check (Ville)

Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220208152317.3019070-1-jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_dp_mst.c