Merge patch series "riscv,isa fixups"
authorPalmer Dabbelt <palmer@rivosinc.com>
Fri, 6 Jan 2023 18:31:12 +0000 (10:31 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 6 Jan 2023 18:31:12 +0000 (10:31 -0800)
commit6710e07f01b54b2d93e81cfe1c207d39d4fdb9a8
treef56e019560d3841de7b48f69b5db12da92686eef
parentb9b916aee6715cd7f3318af6dc360c4729417b94
parenta943385aa80151c6b2611d3a1cf8338af2b257a1
Merge patch series "riscv,isa fixups"

Conor Dooley <conor@kernel.org> says:

From: Conor Dooley <conor.dooley@microchip.com>

I noticed ~today~ while looking at the isa manual that I had not
accounted for another couple of edge cases with my regex. As before, I
think attempting to validate the canonical order for multiletter stuff
makes no sense - but we should totally try to avoid false-positives for
combinations that are known to be valid.

* b4-shazam-merge:
  dt-bindings: riscv: fix single letter canonical order
  dt-bindings: riscv: fix underscore requirement for multi-letter extensions

Link: https://lore.kernel.org/r/20221205174459.60195-1-conor@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/cpus.yaml