Merge patch series "Putting some basic order on isa extension lists"
authorPalmer Dabbelt <palmer@rivosinc.com>
Fri, 20 Jan 2023 00:39:53 +0000 (16:39 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 20 Jan 2023 00:41:04 +0000 (16:41 -0800)
commit61a9b7129070e07c207d89fffbce577223507327
tree780873ef048723b9c4668c38463facdee9aebf29
parentae4d39f753080aff01830a607c22e5abc6012f41
parentf07b2b3f9d47fea308af3ae05613b6b4801e68a3
Merge patch series "Putting some basic order on isa extension lists"

This cleans up the ISA string handling to more closely match a version
of the ISA spec.  This is visible in /proc/cpuinfo and the ordering
changes may break something in userspace, but these orderings have
changed before without issues so with any luck that's still the case.

This also adds documentation so userspace has a better idea of what is
intended when it comes to compatibility for /proc/cpuinfo, which should
help everyone as this will likely keep changing.

* b4-shazam-merge:
  Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo
  RISC-V: resort all extensions in consistent orders
  RISC-V: clarify ISA string ordering rules in cpu.c

Link: https://lore.kernel.org/r/20221205144525.2148448-1-conor.dooley@microchip.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c