switch (event) {
case SND_SOC_DAPM_POST_PMU:
- val = snd_soc_component_read32(component, ARIZONA_INTERRUPT_RAW_STATUS_3);
+ val = snd_soc_component_read32(component,
+ ARIZONA_INTERRUPT_RAW_STATUS_3);
if (val & ARIZONA_SPK_OVERHEAT_STS) {
dev_crit(arizona->dev,
"Speaker not enabled due to temperature\n");
};
EXPORT_SYMBOL_GPL(arizona_rate_val);
-
const struct soc_enum arizona_isrc_fsh[] = {
SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
ARIZONA_ISRC1_FSH_SHIFT, 0xf,
priv->in_pending++;
break;
case SND_SOC_DAPM_POST_PMU:
- snd_soc_component_update_bits(component, reg, ARIZONA_IN1L_MUTE, 0);
+ snd_soc_component_update_bits(component, reg,
+ ARIZONA_IN1L_MUTE, 0);
/* If this is the last input pending then allow VU */
priv->in_pending--;
}
EXPORT_SYMBOL_GPL(arizona_out_ev);
-int arizona_hp_ev(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol,
- int event)
+int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
+ int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct arizona_priv *priv = snd_soc_component_get_drvdata(component);
45158400,
};
-static int arizona_set_opclk(struct snd_soc_component *component, unsigned int clk,
- unsigned int freq)
+static int arizona_set_opclk(struct snd_soc_component *component,
+ unsigned int clk, unsigned int freq)
{
struct arizona_priv *priv = snd_soc_component_get_drvdata(component);
unsigned int reg;
rates = arizona_opclk_ref_48k_rates;
for (ref = 0; ref < ARRAY_SIZE(arizona_opclk_ref_48k_rates) &&
- rates[ref] <= refclk; ref++) {
+ rates[ref] <= refclk; ref++) {
div = 1;
while (rates[ref] / div >= freq && div < 32) {
if (rates[ref] / div == freq) {
}
snd_soc_component_update_bits(component, ARIZONA_SAMPLE_RATE_1,
- ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
+ ARIZONA_SAMPLE_RATE_1_MASK,
+ sr_val);
if (base)
- snd_soc_component_update_bits(component, base + ARIZONA_AIF_RATE_CTRL,
- ARIZONA_AIF1_RATE_MASK, 0);
+ snd_soc_component_update_bits(component,
+ base + ARIZONA_AIF_RATE_CTRL,
+ ARIZONA_AIF1_RATE_MASK, 0);
break;
case ARIZONA_CLK_ASYNCCLK:
- snd_soc_component_update_bits(component, ARIZONA_ASYNC_SAMPLE_RATE_1,
- ARIZONA_ASYNC_SAMPLE_RATE_1_MASK, sr_val);
+ snd_soc_component_update_bits(component,
+ ARIZONA_ASYNC_SAMPLE_RATE_1,
+ ARIZONA_ASYNC_SAMPLE_RATE_1_MASK,
+ sr_val);
if (base)
- snd_soc_component_update_bits(component, base + ARIZONA_AIF_RATE_CTRL,
- ARIZONA_AIF1_RATE_MASK,
- 8 << ARIZONA_AIF1_RATE_SHIFT);
+ snd_soc_component_update_bits(component,
+ base + ARIZONA_AIF_RATE_CTRL,
+ ARIZONA_AIF1_RATE_MASK,
+ 8 << ARIZONA_AIF1_RATE_SHIFT);
break;
default:
arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
base + ARIZONA_AIF_RX_ENABLES);
/* Disable AIF TX/RX before reconfiguring it */
regmap_update_bits_async(arizona->regmap,
- base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0);
+ base + ARIZONA_AIF_TX_ENABLES,
+ 0xff, 0x0);
regmap_update_bits(arizona->regmap,
- base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0);
+ base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0);
}
ret = arizona_hw_params_rate(substream, params, dai);
else
reg = 0;
- return snd_soc_component_update_bits(component, base + ARIZONA_AIF_RATE_CTRL,
- ARIZONA_AIF1_TRI, reg);
+ return snd_soc_component_update_bits(component,
+ base + ARIZONA_AIF_RATE_CTRL,
+ ARIZONA_AIF1_TRI, reg);
}
static void arizona_set_channels_to_mask(struct snd_soc_dai *dai,
arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
return 0;
-
}
static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
fll->ref_src = source;
fll->ref_freq = Fref;
- if (fll->fout && Fref > 0) {
+ if (fll->fout && Fref > 0)
ret = arizona_enable_fll(fll);
- }
return ret;
}
* Most systems have a single static configuration and should use
* platform data instead.
*/
-int arizona_set_output_mode(struct snd_soc_component *component, int output, bool diff)
+int arizona_set_output_mode(struct snd_soc_component *component, int output,
+ bool diff)
{
unsigned int reg, val;
else
val = 0;
- return snd_soc_component_update_bits(component, reg, ARIZONA_OUT1_MONO, val);
+ return snd_soc_component_update_bits(component, reg,
+ ARIZONA_OUT1_MONO, val);
}
EXPORT_SYMBOL_GPL(arizona_set_output_mode);