[ARM] 2934/1: Anubis - fix VA offsets for CPLD registers

[sfrench/cifs-2.6.git] / include / asm-arm / arch-s3c2410 / anubis-map.h

diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index 97741d6e506ae37aeac40032278f8e84cbf83cad..d529ffda8599638c64a6df9409bce444674bcec7 100644 (file)
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -20,22 +20,22 @@
 
 /* start peripherals off after the S3C2410 */
 
-#define ANUBIS_IOADDR(x)       (S3C2410_ADDR((x) + 0x02000000))
+#define ANUBIS_IOADDR(x)       (S3C2410_ADDR((x) + 0x01800000))
 
 #define ANUBIS_PA_CPLD         (S3C2410_CS1 | (1<<26))
 
 /* we put the CPLD registers next, to get them out of the way */
 
-#define ANUBIS_VA_CTRL1            ANUBIS_IOADDR(0x00000000)    /* 0x01300000 */
+#define ANUBIS_VA_CTRL1            ANUBIS_IOADDR(0x00000000)    /* 0x01800000 */
 #define ANUBIS_PA_CTRL1            (ANUBIS_PA_CPLD)
 
-#define ANUBIS_VA_CTRL2            ANUBIS_IOADDR(0x00100000)    /* 0x01400000 */
+#define ANUBIS_VA_CTRL2            ANUBIS_IOADDR(0x00100000)    /* 0x01900000 */
 #define ANUBIS_PA_CTRL2            (ANUBIS_PA_CPLD)
 
-#define ANUBIS_VA_CTRL3            ANUBIS_IOADDR(0x00200000)    /* 0x01500000 */
+#define ANUBIS_VA_CTRL3            ANUBIS_IOADDR(0x00200000)    /* 0x01A00000 */
 #define ANUBIS_PA_CTRL3            (ANUBIS_PA_CPLD)
 
-#define ANUBIS_VA_CTRL4            ANUBIS_IOADDR(0x00300000)    /* 0x01600000 */
+#define ANUBIS_VA_CTRL4            ANUBIS_IOADDR(0x00300000)    /* 0x01B00000 */
 #define ANUBIS_PA_CTRL4            (ANUBIS_PA_CPLD)
 
 #define ANUBIS_IDEPRI      ANUBIS_IOADDR(0x01000000)