*
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/i2c.h>
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
-#define dprintk(args...) do { \
- if (debug) { \
- printk(KERN_DEBUG "DiB0090: "); \
- printk(args); \
- printk("\n"); \
- } \
+#define dprintk(fmt, arg...) do { \
+ if (debug) \
+ printk(KERN_DEBUG pr_fmt("%s: " fmt), \
+ __func__, ##arg); \
} while (0)
#define CONFIG_SYS_DVBT
u16 ret;
if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) {
- dprintk("could not acquire lock");
+ dprintk("could not acquire lock\n");
return 0;
}
state->msg[1].len = 2;
if (i2c_transfer(state->i2c, state->msg, 2) != 2) {
- printk(KERN_WARNING "DiB0090 I2C read failed\n");
+ pr_warn("DiB0090 I2C read failed\n");
ret = 0;
} else
ret = (state->i2c_read_buffer[0] << 8)
int ret;
if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) {
- dprintk("could not acquire lock");
+ dprintk("could not acquire lock\n");
return -EINVAL;
}
state->msg[0].len = 3;
if (i2c_transfer(state->i2c, state->msg, 1) != 1) {
- printk(KERN_WARNING "DiB0090 I2C write failed\n");
+ pr_warn("DiB0090 I2C write failed\n");
ret = -EREMOTEIO;
} else
ret = 0;
u16 ret;
if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) {
- dprintk("could not acquire lock");
+ dprintk("could not acquire lock\n");
return 0;
}
state->msg.buf = state->i2c_read_buffer;
state->msg.len = 2;
if (i2c_transfer(state->i2c, &state->msg, 1) != 1) {
- printk(KERN_WARNING "DiB0090 I2C read failed\n");
+ pr_warn("DiB0090 I2C read failed\n");
ret = 0;
} else
ret = (state->i2c_read_buffer[0] << 8)
int ret;
if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) {
- dprintk("could not acquire lock");
+ dprintk("could not acquire lock\n");
return -EINVAL;
}
state->msg.buf = state->i2c_write_buffer;
state->msg.len = 2;
if (i2c_transfer(state->i2c, &state->msg, 1) != 1) {
- printk(KERN_WARNING "DiB0090 I2C write failed\n");
+ pr_warn("DiB0090 I2C write failed\n");
ret = -EREMOTEIO;
} else
ret = 0;
identity->p1g = 0;
identity->in_soc = 0;
- dprintk("Tuner identification (Version = 0x%04x)", v);
+ dprintk("Tuner identification (Version = 0x%04x)\n", v);
/* without PLL lock info */
v &= ~KROSUS_PLL_LOCKED;
identity->in_soc = 1;
switch (identity->version) {
case SOC_8090_P1G_11R1:
- dprintk("SOC 8090 P1-G11R1 Has been detected");
+ dprintk("SOC 8090 P1-G11R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_8090_P1G_21R1:
- dprintk("SOC 8090 P1-G21R1 Has been detected");
+ dprintk("SOC 8090 P1-G21R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_7090_P1G_11R1:
- dprintk("SOC 7090 P1-G11R1 Has been detected");
+ dprintk("SOC 7090 P1-G11R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_7090_P1G_21R1:
- dprintk("SOC 7090 P1-G21R1 Has been detected");
+ dprintk("SOC 7090 P1-G21R1 Has been detected\n");
identity->p1g = 1;
break;
default:
} else {
switch ((identity->version >> 5) & 0x7) {
case MP001:
- dprintk("MP001 : 9090/8096");
+ dprintk("MP001 : 9090/8096\n");
break;
case MP005:
- dprintk("MP005 : Single Sband");
+ dprintk("MP005 : Single Sband\n");
break;
case MP008:
- dprintk("MP008 : diversity VHF-UHF-LBAND");
+ dprintk("MP008 : diversity VHF-UHF-LBAND\n");
break;
case MP009:
- dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND");
+ dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND\n");
break;
default:
goto identification_error;
switch (identity->version & 0x1f) {
case P1G_21R2:
- dprintk("P1G_21R2 detected");
+ dprintk("P1G_21R2 detected\n");
identity->p1g = 1;
break;
case P1G:
- dprintk("P1G detected");
+ dprintk("P1G detected\n");
identity->p1g = 1;
break;
case P1D_E_F:
- dprintk("P1D/E/F detected");
+ dprintk("P1D/E/F detected\n");
break;
case P1C:
- dprintk("P1C detected");
+ dprintk("P1C detected\n");
break;
case P1A_B:
- dprintk("P1-A/B detected: driver is deactivated - not available");
+ dprintk("P1-A/B detected: driver is deactivated - not available\n");
goto identification_error;
break;
default:
identity->p1g = 0;
identity->in_soc = 0;
- dprintk("FE: Tuner identification (Version = 0x%04x)", v);
+ dprintk("FE: Tuner identification (Version = 0x%04x)\n", v);
/* without PLL lock info */
v &= ~KROSUS_PLL_LOCKED;
identity->in_soc = 1;
switch (identity->version) {
case SOC_8090_P1G_11R1:
- dprintk("SOC 8090 P1-G11R1 Has been detected");
+ dprintk("SOC 8090 P1-G11R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_8090_P1G_21R1:
- dprintk("SOC 8090 P1-G21R1 Has been detected");
+ dprintk("SOC 8090 P1-G21R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_7090_P1G_11R1:
- dprintk("SOC 7090 P1-G11R1 Has been detected");
+ dprintk("SOC 7090 P1-G11R1 Has been detected\n");
identity->p1g = 1;
break;
case SOC_7090_P1G_21R1:
- dprintk("SOC 7090 P1-G21R1 Has been detected");
+ dprintk("SOC 7090 P1-G21R1 Has been detected\n");
identity->p1g = 1;
break;
default:
} else {
switch ((identity->version >> 5) & 0x7) {
case MP001:
- dprintk("MP001 : 9090/8096");
+ dprintk("MP001 : 9090/8096\n");
break;
case MP005:
- dprintk("MP005 : Single Sband");
+ dprintk("MP005 : Single Sband\n");
break;
case MP008:
- dprintk("MP008 : diversity VHF-UHF-LBAND");
+ dprintk("MP008 : diversity VHF-UHF-LBAND\n");
break;
case MP009:
- dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND");
+ dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND\n");
break;
default:
goto identification_error;
switch (identity->version & 0x1f) {
case P1G_21R2:
- dprintk("P1G_21R2 detected");
+ dprintk("P1G_21R2 detected\n");
identity->p1g = 1;
break;
case P1G:
- dprintk("P1G detected");
+ dprintk("P1G detected\n");
identity->p1g = 1;
break;
case P1D_E_F:
- dprintk("P1D/E/F detected");
+ dprintk("P1D/E/F detected\n");
break;
case P1C:
- dprintk("P1C detected");
+ dprintk("P1C detected\n");
break;
case P1A_B:
- dprintk("P1-A/B detected: driver is deactivated - not available");
+ dprintk("P1-A/B detected: driver is deactivated - not available\n");
goto identification_error;
break;
default:
} while (--i);
if (i == 0) {
- dprintk("Pll: Unable to lock Pll");
+ dprintk("Pll: Unable to lock Pll\n");
return;
}
u16 v;
int i;
- dprintk("fw reset digital");
+ dprintk("fw reset digital\n");
HARD_RESET(state);
dib0090_fw_write_reg(state, 0x24, EN_PLL | EN_CRYSTAL);
} while (--i);
if (i == 0) {
- dprintk("Pll: Unable to lock Pll");
+ dprintk("Pll: Unable to lock Pll\n");
return -EIO;
}
#endif
state->wbd_target = dib0090_wbd_to_db(state, state->wbd_offset + offset);
- dprintk("wbd-target: %d dB", (u32) state->wbd_target);
+ dprintk("wbd-target: %d dB\n", (u32) state->wbd_target);
}
static const int gain_reg_addr[4] = {
gain_reg[3] |= ((bb % 10) * 100) / 125;
#ifdef DEBUG_AGC
- dprintk("GA CALC: DB: %3d(rf) + %3d(bb) = %3d gain_reg[0]=%04x gain_reg[1]=%04x gain_reg[2]=%04x gain_reg[0]=%04x", rf, bb, rf + bb,
+ dprintk("GA CALC: DB: %3d(rf) + %3d(bb) = %3d gain_reg[0]=%04x gain_reg[1]=%04x gain_reg[2]=%04x gain_reg[0]=%04x\n", rf, bb, rf + bb,
gain_reg[0], gain_reg[1], gain_reg[2], gain_reg[3]);
#endif
dib0090_write_reg(state, 0x2a, 0xffff);
- dprintk("total RF gain: %ddB, step: %d", (u32) cfg[0], dib0090_read_reg(state, 0x2a));
+ dprintk("total RF gain: %ddB, step: %d\n", (u32) cfg[0], dib0090_read_reg(state, 0x2a));
dib0090_write_regs(state, 0x2c, cfg + 3, 6);
dib0090_write_regs(state, 0x3e, cfg + 9, 2);
dib0090_set_boost(state, cfg[0] > 500); /* we want the boost if the gain is higher that 50dB */
dib0090_write_reg(state, 0x33, 0xffff);
- dprintk("total BB gain: %ddB, step: %d", (u32) cfg[0], dib0090_read_reg(state, 0x33));
+ dprintk("total BB gain: %ddB, step: %d\n", (u32) cfg[0], dib0090_read_reg(state, 0x33));
dib0090_write_regs(state, 0x35, cfg + 3, 4);
}
/* activate the ramp generator using PWM control */
if (state->rf_ramp)
- dprintk("ramp RF gain = %d BAND = %s version = %d",
+ dprintk("ramp RF gain = %d BAND = %s version = %d\n",
state->rf_ramp[0],
(state->current_band == BAND_CBAND) ? "CBAND" : "NOT CBAND",
state->identity.version & 0x1f);
if (rf_ramp && ((state->rf_ramp && state->rf_ramp[0] == 0) ||
(state->current_band == BAND_CBAND &&
(state->identity.version & 0x1f) <= P1D_E_F))) {
- dprintk("DE-Engage mux for direct gain reg control");
+ dprintk("DE-Engage mux for direct gain reg control\n");
en_pwm_rf_mux = 0;
} else
- dprintk("Engage mux for PWM control");
+ dprintk("Engage mux for PWM control\n");
dib0090_write_reg(state, 0x32, (en_pwm_rf_mux << 12) | (en_pwm_rf_mux << 11));
while (f_MHz > wbd->max_freq)
wbd++;
- dprintk("using wbd-table-entry with max freq %d", wbd->max_freq);
+ dprintk("using wbd-table-entry with max freq %d\n", wbd->max_freq);
if (current_temp < 0)
current_temp = 0;
wbd_tcold += ((wbd_thot - wbd_tcold) * current_temp) >> 7;
state->wbd_target = dib0090_wbd_to_db(state, state->wbd_offset + wbd_tcold);
- dprintk("wbd-target: %d dB", (u32) state->wbd_target);
- dprintk("wbd offset applied is %d", wbd_tcold);
+ dprintk("wbd-target: %d dB\n", (u32) state->wbd_target);
+ dprintk("wbd offset applied is %d\n", wbd_tcold);
return state->wbd_offset + wbd_tcold;
}
if ((!state->identity.p1g) || (!state->identity.in_soc)
|| ((state->identity.version != SOC_7090_P1G_21R1)
&& (state->identity.version != SOC_7090_P1G_11R1))) {
- dprintk("%s() function can only be used for dib7090P", __func__);
+ dprintk("%s() function can only be used for dib7090P\n", __func__);
return -ENODEV;
}
dib0090_write_reg(state, 0x14, 1);
else
dib0090_write_reg(state, 0x14, 2);
- dprintk("Pll lock : %d", (dib0090_read_reg(state, 0x1a) >> 11) & 0x1);
+ dprintk("Pll lock : %d\n", (dib0090_read_reg(state, 0x1a) >> 11) & 0x1);
state->calibrate = DC_CAL | WBD_CAL | TEMP_CAL; /* enable iq-offset-calibration and wbd-calibration when tuning next time */
/* fall through */
case CT_TUNER_STEP_0:
- dprintk("Start/continue DC calibration for %s path", (state->dc->i == 1) ? "I" : "Q");
+ dprintk("Start/continue DC calibration for %s path\n",
+ (state->dc->i == 1) ? "I" : "Q");
dib0090_write_reg(state, 0x01, state->dc->bb1);
dib0090_write_reg(state, 0x07, state->bb7 | (state->dc->i << 7));
break;
case CT_TUNER_STEP_5: /* found an offset */
- dprintk("adc_diff = %d, current step= %d", (u32) state->adc_diff, state->step);
+ dprintk("adc_diff = %d, current step= %d\n", (u32) state->adc_diff, state->step);
if (state->step == 0 && state->adc_diff < 0) {
state->min_adc_diff = -1023;
- dprintk("Change of sign of the minimum adc diff");
+ dprintk("Change of sign of the minimum adc diff\n");
}
- dprintk("adc_diff = %d, min_adc_diff = %d current_step = %d", state->adc_diff, state->min_adc_diff, state->step);
+ dprintk("adc_diff = %d, min_adc_diff = %d current_step = %d\n", state->adc_diff, state->min_adc_diff, state->step);
/* first turn for this frequency */
if (state->step == 0) {
} else {
/* the minimum was what we have seen in the step before */
if (ABS(state->adc_diff) > ABS(state->min_adc_diff)) {
- dprintk("Since adc_diff N = %d > adc_diff step N-1 = %d, Come back one step", state->adc_diff, state->min_adc_diff);
+ dprintk("Since adc_diff N = %d > adc_diff step N-1 = %d, Come back one step\n", state->adc_diff, state->min_adc_diff);
state->step--;
}
dib0090_set_trim(state);
- dprintk("BB Offset Cal, BBreg=%hd,Offset=%hd,Value Set=%hd", state->dc->addr, state->adc_diff, state->step);
+ dprintk("BB Offset Cal, BBreg=%hd,Offset=%hd,Value Set=%hd\n", state->dc->addr, state->adc_diff, state->step);
state->dc++;
if (state->dc->addr == 0) /* done */
case CT_TUNER_STEP_0:
state->wbd_offset = dib0090_get_slow_adc_val(state);
- dprintk("WBD calibration offset = %d", state->wbd_offset);
+ dprintk("WBD calibration offset = %d\n", state->wbd_offset);
*tune_state = CT_TUNER_START; /* reset done -> real tuning can now begin */
state->calibrate &= ~WBD_CAL;
break;
if ((!state->identity.p1g) || (!state->identity.in_soc)
|| ((state->identity.version != SOC_7090_P1G_21R1)
&& (state->identity.version != SOC_7090_P1G_11R1))) {
- dprintk("%s() function can only be used for dib7090", __func__);
+ dprintk("%s() function can only be used for dib7090\n", __func__);
return -ENODEV;
}
force_soft_search = 1;
if (*tune_state == CT_TUNER_START) {
- dprintk("Start Captrim search : %s", (force_soft_search == 1) ? "FORCE SOFT SEARCH" : "AUTO");
+ dprintk("Start Captrim search : %s\n",
+ (force_soft_search == 1) ? "FORCE SOFT SEARCH" : "AUTO");
dib0090_write_reg(state, 0x10, 0x2B1);
dib0090_write_reg(state, 0x1e, 0x0032);
dib0090_read_reg(state, 0x40);
state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7F;
- dprintk("***Final Captrim= 0x%x", state->fcaptrim);
+ dprintk("***Final Captrim= 0x%x\n", state->fcaptrim);
*tune_state = CT_TUNER_STEP_3;
} else {
/* MERGE for all krosus before P1G */
adc = dib0090_get_slow_adc_val(state);
- dprintk("CAPTRIM=%d; ADC = %d (ADC) & %dmV", (u32) state->captrim, (u32) adc, (u32) (adc) * (u32) 1800 / (u32) 1024);
+ dprintk("CAPTRIM=%d; ADC = %d (ADC) & %dmV\n", (u32) state->captrim, (u32) adc, (u32) (adc) * (u32) 1800 / (u32) 1024);
if (state->rest == 0 || state->identity.in_soc) { /* Just for 8090P SOCS where auto captrim HW bug : TO CHECK IN ACI for SOCS !!! if 400 for 8090p SOC => tune issue !!! */
adc_target = 200;
}
if (adc < state->adc_diff) {
- dprintk("CAPTRIM=%d is closer to target (%d/%d)", (u32) state->captrim, (u32) adc, (u32) state->adc_diff);
+ dprintk("CAPTRIM=%d is closer to target (%d/%d)\n", (u32) state->captrim, (u32) adc, (u32) state->adc_diff);
state->adc_diff = adc;
state->fcaptrim = state->captrim;
}
val = dib0090_get_slow_adc_val(state);
state->temperature = ((s16) ((val - state->adc_diff) * 180) >> 8) + 55;
- dprintk("temperature: %d C", state->temperature - 30);
+ dprintk("temperature: %d C\n", state->temperature - 30);
*tune_state = CT_TUNER_STEP_2;
break;
wbd++;
dib0090_write_reg(state, 0x1e, 0x07ff);
- dprintk("Final Captrim: %d", (u32) state->fcaptrim);
- dprintk("HFDIV code: %d", (u32) pll->hfdiv_code);
- dprintk("VCO = %d", (u32) pll->vco_band);
- dprintk("VCOF in kHz: %d ((%d*%d) << 1))", (u32) ((pll->hfdiv * state->rf_request) * 2), (u32) pll->hfdiv, (u32) state->rf_request);
- dprintk("REFDIV: %d, FREF: %d", (u32) 1, (u32) state->config->io.clock_khz);
- dprintk("FBDIV: %d, Rest: %d", (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state, 0x17));
- dprintk("Num: %d, Den: %d, SD: %d", (u32) dib0090_read_reg(state, 0x17), (u32) (dib0090_read_reg(state, 0x16) >> 8),
+ dprintk("Final Captrim: %d\n", (u32) state->fcaptrim);
+ dprintk("HFDIV code: %d\n", (u32) pll->hfdiv_code);
+ dprintk("VCO = %d\n", (u32) pll->vco_band);
+ dprintk("VCOF in kHz: %d ((%d*%d) << 1))\n", (u32) ((pll->hfdiv * state->rf_request) * 2), (u32) pll->hfdiv, (u32) state->rf_request);
+ dprintk("REFDIV: %d, FREF: %d\n", (u32) 1, (u32) state->config->io.clock_khz);
+ dprintk("FBDIV: %d, Rest: %d\n", (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state, 0x17));
+ dprintk("Num: %d, Den: %d, SD: %d\n", (u32) dib0090_read_reg(state, 0x17), (u32) (dib0090_read_reg(state, 0x16) >> 8),
(u32) dib0090_read_reg(state, 0x1c) & 0x3);
#define WBD 0x781 /* 1 1 1 1 0000 0 0 1 */
dib0090_write_reg(state, 0x10, state->wbdmux);
if ((tune->tuner_enable == EN_CAB) && state->identity.p1g) {
- dprintk("P1G : The cable band is selected and lna_tune = %d", tune->lna_tune);
+ dprintk("P1G : The cable band is selected and lna_tune = %d\n", tune->lna_tune);
dib0090_write_reg(state, 0x09, tune->lna_bias);
dib0090_write_reg(state, 0x0b, 0xb800 | (tune->lna_tune << 6) | (tune->switch_trim));
} else
if (dib0090_reset(fe) != 0)
goto free_mem;
- printk(KERN_INFO "DiB0090: successfully identified\n");
+ pr_info("DiB0090: successfully identified\n");
memcpy(&fe->ops.tuner_ops, &dib0090_ops, sizeof(struct dvb_tuner_ops));
return fe;
if (dib0090_fw_reset_digital(fe, st->config) != 0)
goto free_mem;
- dprintk("DiB0090 FW: successfully identified");
+ dprintk("DiB0090 FW: successfully identified\n");
memcpy(&fe->ops.tuner_ops, &dib0090_fw_ops, sizeof(struct dvb_tuner_ops));
return fe;
git.samba.org / sfrench / cifs-2.6.git / blobdiff