#include <linux/platform_device.h>
#include <linux/platform_data/itco_wdt.h>
#include <linux/pm_runtime.h>
+#include <linux/mutex.h>
#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
#include <linux/gpio/machine.h>
static int i801_block_transaction_by_block(struct i801_priv *priv,
union i2c_smbus_data *data,
- char read_write, int command,
- int hwpec)
+ char read_write, int command)
{
- int i, len;
- int status;
- int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
+ int i, len, status, xact;
switch (command) {
case I2C_SMBUS_BLOCK_PROC_CALL:
- xact |= I801_BLOCK_PROC_CALL;
+ xact = I801_BLOCK_PROC_CALL;
break;
case I2C_SMBUS_BLOCK_DATA:
- xact |= I801_BLOCK_DATA;
+ xact = I801_BLOCK_DATA;
break;
default:
return -EOPNOTSUPP;
priv->len);
/* FIXME: Recover */
priv->len = I2C_SMBUS_BLOCK_MAX;
- } else {
- dev_dbg(&priv->pci_dev->dev,
- "SMBus block read size is %d\n",
- priv->len);
}
priv->data[-1] = priv->len;
}
*/
static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
union i2c_smbus_data *data,
- char read_write, int command,
- int hwpec)
+ char read_write, int command)
{
int i, len;
int smbcmd;
}
/* Block transaction function */
-static int i801_block_transaction(struct i801_priv *priv,
- union i2c_smbus_data *data, char read_write,
- int command, int hwpec)
+static int i801_block_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
+ char read_write, int command)
{
int result = 0;
unsigned char hostc;
&& i801_set_block_buffer_mode(priv) == 0)
result = i801_block_transaction_by_block(priv, data,
read_write,
- command, hwpec);
+ command);
else
result = i801_block_transaction_byte_by_byte(priv, data,
read_write,
- command, hwpec);
+ command);
if (command == I2C_SMBUS_I2C_BLOCK_DATA
&& read_write == I2C_SMBUS_WRITE) {
SMBAUXCTL(priv));
if (block)
- ret = i801_block_transaction(priv, data, read_write, size,
- hwpec);
+ ret = i801_block_transaction(priv, data, read_write, size);
else
ret = i801_transaction(priv, xact);
.version = 4,
};
-static DEFINE_SPINLOCK(p2sb_spinlock);
-
static struct platform_device *
i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
struct resource *tco_res)
{
+ static DEFINE_MUTEX(p2sb_mutex);
struct resource *res;
unsigned int devfn;
u64 base64_addr;
* enumerated by the PCI subsystem, so we need to unhide/hide it
* to lookup the P2SB BAR.
*/
- spin_lock(&p2sb_spinlock);
+ mutex_lock(&p2sb_mutex);
devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
/* Hide the P2SB device, if it was hidden before */
if (hidden)
pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
- spin_unlock(&p2sb_spinlock);
+ mutex_unlock(&p2sb_mutex);
res = &tco_res[1];
if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
* BIOS is accessing the host controller so prevent it from
* suspending automatically from now on.
*/
- pm_runtime_get_sync(&pdev->dev);
+ pm_runtime_set_autosuspend_delay(&pdev->dev, -1);
}
if ((function & ACPI_IO_MASK) == ACPI_READ)
acpi_remove_address_space_handler(adev->handle,
ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
-
- mutex_lock(&priv->acpi_lock);
- if (priv->acpi_reserved)
- pm_runtime_put(&priv->pci_dev->dev);
- mutex_unlock(&priv->acpi_lock);
}
#else
static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
unsigned char hstcfg = priv->original_hstcfg;
hstcfg &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */
+ hstcfg &= ~SMBHSTCNT_PEC_EN; /* Disable software PEC */
hstcfg |= SMBHSTCFG_HST_EN;
pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg);
}