Merge tag 'drm-misc-next-2022-01-27' of git://anongit.freedesktop.org/drm/drm-misc...

[sfrench/cifs-2.6.git] / drivers / gpu / drm / msm / dp / dp_ctrl.c

diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index ecf20458c75eca1cf8bd3fb2762947d88d778fed..88ca6c3aedd33e69c34bd60a40c35288e9d0ee51 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -119,13 +119,13 @@ void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl)
 static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl)
 {
        u32 config = 0, tbd;
-       u8 *dpcd = ctrl->panel->dpcd;
+       const u8 *dpcd = ctrl->panel->dpcd;
 
        /* Default-> LSCLK DIV: 1/4 LCLK  */
        config |= (2 << DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT);
 
        /* Scrambler reset enable */
-       if (dpcd[DP_EDP_CONFIGURATION_CAP] & DP_ALTERNATE_SCRAMBLER_RESET_CAP)
+       if (drm_dp_alternate_scrambler_reset_cap(dpcd))
                config |= DP_CONFIGURATION_CTRL_ASSR;
 
        tbd = dp_link_get_test_bits_depth(ctrl->link,
@@ -1228,7 +1228,10 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
                        int *training_step)
 {
        int ret = 0;
+       const u8 *dpcd = ctrl->panel->dpcd;
        u8 encoding = DP_SET_ANSI_8B10B;
+       u8 ssc;
+       u8 assr;
        struct dp_link_info link_info = {0};
 
        dp_ctrl_config_ctrl(ctrl);
@@ -1238,9 +1241,21 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
        link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING;
 
        dp_aux_link_configure(ctrl->aux, &link_info);
+
+       if (drm_dp_max_downspread(dpcd)) {
+               ssc = DP_SPREAD_AMP_0_5;
+               drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1);
+       }
+
        drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
                                &encoding, 1);
 
+       if (drm_dp_alternate_scrambler_reset_cap(dpcd)) {
+               assr = DP_ALTERNATE_SCRAMBLER_RESET_ENABLE;
+               drm_dp_dpcd_write(ctrl->aux, DP_EDP_CONFIGURATION_SET,
+                               &assr, 1);
+       }
+
        ret = dp_ctrl_link_train_1(ctrl, training_step);
        if (ret) {
                DRM_ERROR("link training #1 failed. ret=%d\n", ret);
@@ -1312,9 +1327,11 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl)
        struct dp_io *dp_io = &ctrl->parser->io;
        struct phy *phy = dp_io->phy;
        struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp;
+       const u8 *dpcd = ctrl->panel->dpcd;
 
        opts_dp->lanes = ctrl->link->link_params.num_lanes;
        opts_dp->link_rate = ctrl->link->link_params.rate / 100;
+       opts_dp->ssc = drm_dp_max_downspread(dpcd);
        dp_ctrl_set_clock_rate(ctrl, DP_CTRL_PM, "ctrl_link",
                                        ctrl->link->link_params.rate * 1000);
 
@@ -1406,7 +1423,7 @@ void dp_ctrl_host_deinit(struct dp_ctrl *dp_ctrl)
 
 static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl)
 {
-       u8 *dpcd = ctrl->panel->dpcd;
+       const u8 *dpcd = ctrl->panel->dpcd;
 
        /*
         * For better interop experience, used a fixed NVID=0x8000