Merge v5.2-rc5 into drm-next

[sfrench/cifs-2.6.git] / drivers / gpu / drm / meson / meson_plane.c

diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index 5c7d39d1cde9c7b5b95f250dacadc0783987704a..7a7e88dadd0bc10412cb84aac95f6e1b9a47e417 100644 (file)
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -319,6 +319,8 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
                meson_plane->enabled = true;
        }
 
+       priv->viu.osd1_enabled = true;
+
        spin_unlock_irqrestore(&priv->drm->event_lock, flags);
 }
 
@@ -330,14 +332,14 @@ static void meson_plane_atomic_disable(struct drm_plane *plane,
 
        /* Disable OSD1 */
        if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu"))
-               writel_bits_relaxed(BIT(0) | BIT(21), 0,
-                       priv->io_base + _REG(VIU_OSD1_CTRL_STAT));
+               writel_bits_relaxed(3 << 8, 0,
+                                   priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
        else
                writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0,
                                    priv->io_base + _REG(VPP_MISC));
 
        meson_plane->enabled = false;
-
+       priv->viu.osd1_enabled = false;
 }
 
 static const struct drm_plane_helper_funcs meson_plane_helper_funcs = {