Merge tag 'drm-intel-next-2021-01-04' of git://anongit.freedesktop.org/drm/drm-intel...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / i915_reg.h
index 593b6c97dcbdb79e4fd89adc73323e8233bb4b03..0023c023f472a7b54fe7ddb5c5d36e26798890cd 100644 (file)
@@ -8999,10 +8999,6 @@ enum {
 #define   GEN9_PWRGT_MEDIA_STATUS_MASK         (1 << 0)
 #define   GEN9_PWRGT_RENDER_STATUS_MASK                (1 << 1)
 
-#define POWERGATE_ENABLE                       _MMIO(0xa210)
-#define    VDN_HCP_POWERGATE_ENABLE(n)         BIT(((n) * 2) + 3)
-#define    VDN_MFX_POWERGATE_ENABLE(n)         BIT(((n) * 2) + 4)
-
 #define  GTFIFODBG                             _MMIO(0x120000)
 #define    GT_FIFO_SBDEDICATE_FREE_ENTRY_CHV   (0x1f << 20)
 #define    GT_FIFO_FREE_ENTRIES_CHV            (0x7f << 13)
@@ -9142,9 +9138,11 @@ enum {
 #define GEN9_MEDIA_PG_IDLE_HYSTERESIS          _MMIO(0xA0C4)
 #define GEN9_RENDER_PG_IDLE_HYSTERESIS         _MMIO(0xA0C8)
 #define GEN9_PG_ENABLE                         _MMIO(0xA210)
-#define GEN9_RENDER_PG_ENABLE                  REG_BIT(0)
-#define GEN9_MEDIA_PG_ENABLE                   REG_BIT(1)
-#define GEN11_MEDIA_SAMPLER_PG_ENABLE          REG_BIT(2)
+#define   GEN9_RENDER_PG_ENABLE                        REG_BIT(0)
+#define   GEN9_MEDIA_PG_ENABLE                 REG_BIT(1)
+#define   GEN11_MEDIA_SAMPLER_PG_ENABLE                REG_BIT(2)
+#define   VDN_HCP_POWERGATE_ENABLE(n)          REG_BIT(3 + 2 * (n))
+#define   VDN_MFX_POWERGATE_ENABLE(n)          REG_BIT(4 + 2 * (n))
 #define GEN8_PUSHBUS_CONTROL                   _MMIO(0xA248)
 #define GEN8_PUSHBUS_ENABLE                    _MMIO(0xA250)
 #define GEN8_PUSHBUS_SHIFT                     _MMIO(0xA25C)