Merge drm/drm-next into drm-intel-gt-next

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 32b2b85685bb52d210fb50f8f54a6eff344a0410..97a5f197b7ed739a1e46481927ac62ade940d216 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -285,27 +285,12 @@ struct drm_i915_private {
 
        unsigned long gem_quirks;
 
-       struct drm_atomic_state *modeset_restore_state;
-       struct drm_modeset_acquire_ctx reset_ctx;
-
        struct i915_gem_mm mm;
 
-       /* Kernel Modesetting */
-
-       struct list_head global_obj_list;
-
        bool mchbar_need_disable;
 
        struct intel_l3_parity l3_parity;
 
-       /*
-        * HTI (aka HDPORT) state read during initial hw readout.  Most
-        * platforms don't have HTI, so this will just stay 0.  Those that do
-        * will use this later to figure out which PLLs and PHYs are unavailable
-        * for driver usage.
-        */
-       u32 hti_state;
-
        /*
         * edram size in MB.
         * Cannot be determined by PCIID. You must always read a register.