drm/i915/gvt: Do not reset pv_notified when vGPU transit from D3->D0

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / gvt / vgpu.c

diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index fb12448fe353409723954a5cc459e6a76e27a44f..8fa9b31a248401ffc28a0b862827e3da6c4f2fa0 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -579,13 +579,14 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
                        intel_vgpu_reset_cfg_space(vgpu);
                        /* only reset the failsafe mode when dmlr reset */
                        vgpu->failsafe = false;
-                       vgpu->pv_notified = false;
                        /*
                         * PCI_D0 is set before dmlr, so reset d3_entered here
                         * after done using.
                         */
                        if(vgpu->d3_entered)
                                vgpu->d3_entered = false;
+                       else
+                               vgpu->pv_notified = false;
                }
        }