drm/i915/gvt: refine ggtt range validation

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / gvt / gtt.c

diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index f3a75bb9ec276c983d3f49b8a4dbc291d2410e5e..d767c45a57e2d959b05da775b8bc00af4a1a830b 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -53,13 +53,19 @@ static int preallocated_oos_pages = 8192;
  */
 bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size)
 {
-       if ((!vgpu_gmadr_is_valid(vgpu, addr)) || (size
-                       && !vgpu_gmadr_is_valid(vgpu, addr + size - 1))) {
-               gvt_vgpu_err("invalid range gmadr 0x%llx size 0x%x\n",
-                               addr, size);
-               return false;
-       }
-       return true;
+       if (size == 0)
+               return vgpu_gmadr_is_valid(vgpu, addr);
+
+       if (vgpu_gmadr_is_aperture(vgpu, addr) &&
+           vgpu_gmadr_is_aperture(vgpu, addr + size - 1))
+               return true;
+       else if (vgpu_gmadr_is_hidden(vgpu, addr) &&
+                vgpu_gmadr_is_hidden(vgpu, addr + size - 1))
+               return true;
+
+       gvt_dbg_mm("Invalid ggtt range at 0x%llx, size: 0x%x\n",
+                    addr, size);
+       return false;
 }
 
 /* translate a guest gmadr to host gmadr */