drm/amd/powerplay: correct Vega20 cached smu feature state

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / powerplay / hwmgr / vega20_hwmgr.c

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index 3b8839641770bef71f9e2f39db60acba86845ecb..e9676ebdba6303431452619098343369d69357cd 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -979,10 +979,7 @@ static int vega20_disable_all_smu_features(struct pp_hwmgr *hwmgr)
 {
        struct vega20_hwmgr *data =
                        (struct vega20_hwmgr *)(hwmgr->backend);
-       uint64_t features_enabled;
-       int i;
-       bool enabled;
-       int ret = 0;
+       int i, ret = 0;
 
        PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
                        PPSMC_MSG_DisableAllSmuFeatures,
@@ -990,17 +987,8 @@ static int vega20_disable_all_smu_features(struct pp_hwmgr *hwmgr)
                        "[DisableAllSMUFeatures] Failed to disable all smu features!",
                        return ret);
 
-       ret = vega20_get_enabled_smc_features(hwmgr, &features_enabled);
-       PP_ASSERT_WITH_CODE(!ret,
-                       "[DisableAllSMUFeatures] Failed to get enabled smc features!",
-                       return ret);
-
-       for (i = 0; i < GNLD_FEATURES_MAX; i++) {
-               enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ?
-                       true : false;
-               data->smu_features[i].enabled = enabled;
-               data->smu_features[i].supported = enabled;
-       }
+       for (i = 0; i < GNLD_FEATURES_MAX; i++)
+               data->smu_features[i].enabled = 0;
 
        return 0;
 }
@@ -3230,10 +3218,11 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
 
 static int vega20_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks)
 {
-       uint64_t features_enabled;
-       uint64_t features_to_enable;
-       uint64_t features_to_disable;
-       int ret = 0;
+       struct vega20_hwmgr *data =
+                       (struct vega20_hwmgr *)(hwmgr->backend);
+       uint64_t features_enabled, features_to_enable, features_to_disable;
+       int i, ret = 0;
+       bool enabled;
 
        if (new_ppfeature_masks >= (1ULL << GNLD_FEATURES_MAX))
                return -EINVAL;
@@ -3262,6 +3251,17 @@ static int vega20_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfe
                        return ret;
        }
 
+       /* Update the cached feature enablement state */
+       ret = vega20_get_enabled_smc_features(hwmgr, &features_enabled);
+       if (ret)
+               return ret;
+
+       for (i = 0; i < GNLD_FEATURES_MAX; i++) {
+               enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ?
+                       true : false;
+               data->smu_features[i].enabled = enabled;
+       }
+
        return 0;
 }