drm/amd/powerplay: add the hw manager for vega20 (v3)
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / powerplay / hwmgr / hwmgr.c
index 8994aa5c8cf80cb56734a3737c6bffc39bb3cfe0..7500a3e61dbaa453c4ddeb32a137f920f63b78b2 100644 (file)
@@ -44,11 +44,13 @@ extern const struct pp_smumgr_func vegam_smu_funcs;
 extern const struct pp_smumgr_func vega10_smu_funcs;
 extern const struct pp_smumgr_func vega12_smu_funcs;
 extern const struct pp_smumgr_func smu10_smu_funcs;
+extern const struct pp_smumgr_func vega20_smu_funcs;
 
 extern int smu7_init_function_pointers(struct pp_hwmgr *hwmgr);
 extern int smu8_init_function_pointers(struct pp_hwmgr *hwmgr);
 extern int vega10_hwmgr_init(struct pp_hwmgr *hwmgr);
 extern int vega12_hwmgr_init(struct pp_hwmgr *hwmgr);
+extern int vega20_hwmgr_init(struct pp_hwmgr *hwmgr);
 extern int smu10_init_function_pointers(struct pp_hwmgr *hwmgr);
 
 static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr);
@@ -149,7 +151,6 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
        case AMDGPU_FAMILY_AI:
                switch (hwmgr->chip_id) {
                case CHIP_VEGA10:
-               case CHIP_VEGA20:
                        hwmgr->feature_mask &= ~PP_GFXOFF_MASK;
                        hwmgr->smumgr_funcs = &vega10_smu_funcs;
                        vega10_hwmgr_init(hwmgr);
@@ -158,6 +159,11 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
                        hwmgr->smumgr_funcs = &vega12_smu_funcs;
                        vega12_hwmgr_init(hwmgr);
                        break;
+               case CHIP_VEGA20:
+                       hwmgr->feature_mask &= ~PP_GFXOFF_MASK;
+                       hwmgr->smumgr_funcs = &vega20_smu_funcs;
+                       vega20_hwmgr_init(hwmgr);
+                       break;
                default:
                        return -EINVAL;
                }