drm/amd/pp: Make sure clock_voltage_limit_table on dc is valid

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / powerplay / hwmgr / hwmgr.c

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index e63bc47dc715f12dcac2280ab66d80a5e0b03d7d..4ef77cebc62848d7c0820fd079bad69e574c4816 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -236,6 +236,11 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
        ret = hwmgr->hwmgr_func->backend_init(hwmgr);
        if (ret)
                goto err1;
+ /* make sure dc limits are valid */
+       if ((hwmgr->dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
+                       (hwmgr->dyn_state.max_clock_voltage_on_dc.mclk == 0))
+                       hwmgr->dyn_state.max_clock_voltage_on_dc =
+                                       hwmgr->dyn_state.max_clock_voltage_on_ac;
 
        ret = psm_init_power_state_table(hwmgr);
        if (ret)