Merge tag 'amd-drm-fixes-6.1-2022-11-23' of https://gitlab.freedesktop.org/agd5f...

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / display / dc / clk_mgr / dcn314 / dcn314_smu.c

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
index ef0795b14a1fd0e2666661771aeab0f10f7da8d8..2db595672a469da3c760602532b1b8f53ac1719e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
@@ -123,9 +123,10 @@ static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
        uint32_t result;
 
        result = dcn314_smu_wait_for_response(clk_mgr, 10, 200000);
-       ASSERT(result == VBIOSSMC_Result_OK);
 
-       smu_print("SMU response after wait: %d\n", result);
+       if (result != VBIOSSMC_Result_OK)
+               smu_print("SMU Response was not OK. SMU response after wait received is: %d\n",
+                               result);
 
        if (result == VBIOSSMC_Status_BUSY)
                return -1;
@@ -216,6 +217,12 @@ int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int request
                        VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
                        khz_to_mhz_ceil(requested_dcfclk_khz));
 
+#ifdef DBG
+       smu_print("actual_dcfclk_set_mhz %d is set to : %d\n",
+                       actual_dcfclk_set_mhz,
+                       actual_dcfclk_set_mhz * 1000);
+#endif
+
        return actual_dcfclk_set_mhz * 1000;
 }