drm/amdgpu: enable gfx eop interrupt per gfx pipe

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / gfx_v7_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 4cd1731d62fdc1a4cf819691feb4ab249cc7d1b0..bc5ff82565d20d8a27a06665ec79370622fc7fc7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4460,7 +4460,7 @@ static int gfx_v7_0_sw_init(void *handle)
                ring->ring_obj = NULL;
                sprintf(ring->name, "gfx");
                r = amdgpu_ring_init(adev, ring, 1024,
-                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
+                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP);
                if (r)
                        return r;
        }
@@ -4797,7 +4797,7 @@ static int gfx_v7_0_set_eop_interrupt_state(struct amdgpu_device *adev,
                                            enum amdgpu_interrupt_state state)
 {
        switch (type) {
-       case AMDGPU_CP_IRQ_GFX_EOP:
+       case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP:
                gfx_v7_0_set_gfx_eop_interrupt_state(adev, state);
                break;
        case AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP: