Merge tag 'amd-drm-next-5.19-2022-04-15' of https://gitlab.freedesktop.org/agd5f...

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_cs.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 12bad207bb0f64441e94b0c376d3b5ceade0c1b9..71633a1fedfddd2dce4a9e67fdbe1199e2835ec9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -55,8 +55,8 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
        bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
        p->uf_entry.priority = 0;
        p->uf_entry.tv.bo = &bo->tbo;
-       /* One for TTM and one for the CS job */
-       p->uf_entry.tv.num_shared = 2;
+       /* One for TTM and two for the CS job */
+       p->uf_entry.tv.num_shared = 3;
 
        drm_gem_object_put(gobj);
 
@@ -574,14 +574,6 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
                struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
 
                e->bo_va = amdgpu_vm_bo_find(vm, bo);
-
-               if (bo->tbo.base.dma_buf && !amdgpu_bo_explicit_sync(bo)) {
-                       e->chain = dma_fence_chain_alloc();
-                       if (!e->chain) {
-                               r = -ENOMEM;
-                               goto error_validate;
-                       }
-               }
        }
 
        /* Move fence waiting after getting reservation lock of
@@ -642,13 +634,8 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
        }
 
 error_validate:
-       if (r) {
-               amdgpu_bo_list_for_each_entry(e, p->bo_list) {
-                       dma_fence_chain_free(e->chain);
-                       e->chain = NULL;
-               }
+       if (r)
                ttm_eu_backoff_reservation(&p->ticket, &p->validated);
-       }
 out:
        return r;
 }
@@ -688,17 +675,9 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error,
 {
        unsigned i;
 
-       if (error && backoff) {
-               struct amdgpu_bo_list_entry *e;
-
-               amdgpu_bo_list_for_each_entry(e, parser->bo_list) {
-                       dma_fence_chain_free(e->chain);
-                       e->chain = NULL;
-               }
-
+       if (error && backoff)
                ttm_eu_backoff_reservation(&parser->ticket,
                                           &parser->validated);
-       }
 
        for (i = 0; i < parser->num_post_deps; i++) {
                drm_syncobj_put(parser->post_deps[i].syncobj);
@@ -1272,24 +1251,9 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 
        amdgpu_vm_move_to_lru_tail(p->adev, &fpriv->vm);
 
-       amdgpu_bo_list_for_each_entry(e, p->bo_list) {
-               struct dma_resv *resv = e->tv.bo->base.resv;
-               struct dma_fence_chain *chain = e->chain;
-
-               if (!chain)
-                       continue;
-
-               /*
-                * Work around dma_resv shortcomings by wrapping up the
-                * submission in a dma_fence_chain and add it as exclusive
-                * fence.
-                */
-               dma_fence_chain_init(chain, dma_resv_excl_fence(resv),
-                                    dma_fence_get(p->fence), 1);
-
-               rcu_assign_pointer(resv->fence_excl, &chain->base);
-               e->chain = NULL;
-       }
+       /* Make sure all BOs are remembered as writers */
+       amdgpu_bo_list_for_each_entry(e, p->bo_list)
+               e->tv.num_shared = 0;
 
        ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence);
        mutex_unlock(&p->adev->notifier_lock);