x86/tsc: Set LAPIC timer period to crystal clock frequency

[sfrench/cifs-2.6.git] / arch / x86 / kernel / tsc.c

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 6e6d933fb99c36ea0006daf42aff561e274e47bf..8f47c4862c56adce7a9a67ae33113a4bde5de0e9 100644 (file)
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -671,6 +671,16 @@ unsigned long native_calibrate_tsc(void)
        if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)
                setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
 
+#ifdef CONFIG_X86_LOCAL_APIC
+       /*
+        * The local APIC appears to be fed by the core crystal clock
+        * (which sounds entirely sensible). We can set the global
+        * lapic_timer_period here to avoid having to calibrate the APIC
+        * timer later.
+        */
+       lapic_timer_period = crystal_khz * 1000 / HZ;
+#endif
+
        return crystal_khz * ebx_numerator / eax_denominator;
 }