Merge patch series "riscv: dma-mapping: unify support for cache flushes"

[sfrench/cifs-2.6.git] / arch / riscv / mm / dma-noncoherent.c

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index 7270b4d8c05b4d4801b4cd21d61ce8cc8964a004..f269990e26c3713c0cffd7dab739d25b117c5e7f 100644 (file)
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -14,21 +14,61 @@ static bool noncoherent_supported __ro_after_init;
 int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN;
 EXPORT_SYMBOL_GPL(dma_cache_alignment);
 
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-                             enum dma_data_direction dir)
+static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t size)
+{
+       void *vaddr = phys_to_virt(paddr);
+
+       ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
+}
+
+static inline void arch_dma_cache_inv(phys_addr_t paddr, size_t size)
+{
+       void *vaddr = phys_to_virt(paddr);
+
+       ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size);
+}
+
+static inline void arch_dma_cache_wback_inv(phys_addr_t paddr, size_t size)
 {
        void *vaddr = phys_to_virt(paddr);
 
+       ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+}
+
+static inline bool arch_sync_dma_clean_before_fromdevice(void)
+{
+       return true;
+}
+
+static inline bool arch_sync_dma_cpu_needs_post_dma_flush(void)
+{
+       return true;
+}
+
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
+                             enum dma_data_direction dir)
+{
        switch (dir) {
        case DMA_TO_DEVICE:
-               ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
+               arch_dma_cache_wback(paddr, size);
                break;
+
        case DMA_FROM_DEVICE:
-               ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
-               break;
+               if (!arch_sync_dma_clean_before_fromdevice()) {
+                       arch_dma_cache_inv(paddr, size);
+                       break;
+               }
+               fallthrough;
+
        case DMA_BIDIRECTIONAL:
-               ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+               /* Skip the invalidate here if it's done later */
+               if (IS_ENABLED(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) &&
+                   arch_sync_dma_cpu_needs_post_dma_flush())
+                       arch_dma_cache_wback(paddr, size);
+               else
+                       arch_dma_cache_wback_inv(paddr, size);
                break;
+
        default:
                break;
        }
@@ -37,15 +77,17 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
                           enum dma_data_direction dir)
 {
-       void *vaddr = phys_to_virt(paddr);
-
        switch (dir) {
        case DMA_TO_DEVICE:
                break;
+
        case DMA_FROM_DEVICE:
        case DMA_BIDIRECTIONAL:
-               ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+               /* FROM_DEVICE invalidate needed if speculative CPU prefetch only */
+               if (arch_sync_dma_cpu_needs_post_dma_flush())
+                       arch_dma_cache_inv(paddr, size);
                break;
+
        default:
                break;
        }