arch/riscv: disable excess harts before picking main boot hart

[sfrench/cifs-2.6.git] / arch / riscv / kernel / head.S

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 15a9189f91ad27f445f96983d56ab1f3186940b4..72f89b7590dd628fa37a5e62821783e3abca2739 100644 (file)
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -63,6 +63,11 @@ _start_kernel:
        li t0, SR_FS
        csrc CSR_SSTATUS, t0
 
+#ifdef CONFIG_SMP
+       li t0, CONFIG_NR_CPUS
+       bgeu a0, t0, .Lsecondary_park
+#endif
+
        /* Pick one hart to run the main boot sequence */
        la a3, hart_lottery
        li a2, 1
@@ -154,9 +159,6 @@ relocate:
 
 .Lsecondary_start:
 #ifdef CONFIG_SMP
-       li a1, CONFIG_NR_CPUS
-       bgeu a0, a1, .Lsecondary_park
-
        /* Set trap vector to spin forever to help debug */
        la a3, .Lsecondary_park
        csrw CSR_STVEC, a3