RISC-V: Add PE/COFF header for EFI stub

[sfrench/cifs-2.6.git] / arch / riscv / kernel / head.S

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 703e59d717f0688c86a0117931fb6f5d77968fd1..11e2a4fe66e0af9bb0650cf2156432f9c965fad6 100644 (file)
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -12,6 +12,7 @@
 #include <asm/csr.h>
 #include <asm/hwcap.h>
 #include <asm/image.h>
+#include "efi-header.S"
 
 __HEAD
 ENTRY(_start)
@@ -21,10 +22,18 @@ ENTRY(_start)
         * Do not modify it without modifying the structure and all bootloaders
         * that expects this header format!!
         */
+#ifdef CONFIG_EFI
+       /*
+        * This instruction decodes to "MZ" ASCII required by UEFI.
+        */
+       c.li s4,-13
+       j _start_kernel
+#else
        /* jump to start kernel */
        j _start_kernel
        /* reserved */
        .word 0
+#endif
        .balign 8
 #if __riscv_xlen == 64
        /* Image load offset(2MB) from start of RAM */
@@ -42,7 +51,14 @@ ENTRY(_start)
        .ascii RISCV_IMAGE_MAGIC
        .balign 4
        .ascii RISCV_IMAGE_MAGIC2
+#ifdef CONFIG_EFI
+       .word pe_head_start - _start
+pe_head_start:
+
+       __EFI_PE_HEADER
+#else
        .word 0
+#endif
 
 .align 2
 #ifdef CONFIG_MMU