Merge tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel...
[sfrench/cifs-2.6.git] / arch / riscv / Kconfig
index f9fbfbf11ad2851d7cf266febb3eaea6ffdf7b81..5138dce1a0b4ce9b2fcce8a451d4d3117820a60b 100644 (file)
@@ -35,6 +35,7 @@ config RISCV
        select ARCH_HAS_SET_MEMORY if MMU
        select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
        select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL
+       select ARCH_HAS_SYSCALL_WRAPPER
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_HAS_UBSAN_SANITIZE_ALL
        select ARCH_HAS_VDSO_DATA
@@ -42,12 +43,14 @@ config RISCV
        select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
        select ARCH_STACKWALK
        select ARCH_SUPPORTS_ATOMIC_RMW
+       select ARCH_SUPPORTS_CFI_CLANG
        select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
        select ARCH_SUPPORTS_HUGETLBFS if MMU
        select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
        select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
        select ARCH_USE_MEMTEST
        select ARCH_USE_QUEUED_RWLOCKS
+       select ARCH_USES_CFI_TRAPS if CFI_CLANG
        select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
        select ARCH_WANT_FRAME_POINTERS
        select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT
@@ -62,6 +65,7 @@ config RISCV
        select COMMON_CLK
        select CPU_PM if CPU_IDLE || HIBERNATION
        select EDAC_SUPPORT
+       select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE)
        select GENERIC_ARCH_TOPOLOGY
        select GENERIC_ATOMIC64 if !64BIT
        select GENERIC_CLOCKEVENTS_BROADCAST if SMP
@@ -130,6 +134,7 @@ config RISCV
        select HAVE_PERF_REGS
        select HAVE_PERF_USER_STACK_DUMP
        select HAVE_POSIX_CPU_TIMERS_TASK_WORK
+       select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL
        select HAVE_REGS_AND_STACK_ACCESS_API
        select HAVE_RETHOOK if !XIP_KERNEL
        select HAVE_RSEQ
@@ -267,6 +272,7 @@ config RISCV_DMA_NONCOHERENT
        select ARCH_HAS_SETUP_DMA_OPS
        select ARCH_HAS_SYNC_DMA_FOR_CPU
        select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+       select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
        select DMA_DIRECT_REMAP
 
 config AS_HAS_INSN
@@ -836,6 +842,24 @@ config XIP_PHYS_ADDR
          be linked for and stored to.  This address is dependent on your
          own flash usage.
 
+config RISCV_ISA_FALLBACK
+       bool "Permit falling back to parsing riscv,isa for extension support by default"
+       default y
+       help
+         Parsing the "riscv,isa" devicetree property has been deprecated and
+         replaced by a list of explicitly defined strings. For compatibility
+         with existing platforms, the kernel will fall back to parsing the
+         "riscv,isa" property if the replacements are not found.
+
+         Selecting N here will result in a kernel that does not use the
+         fallback, unless the commandline "riscv_isa_fallback" parameter is
+         present.
+
+         Please see the dt-binding, located at
+         Documentation/devicetree/bindings/riscv/extensions.yaml for details
+         on the replacement properties, "riscv,isa-base" and
+         "riscv,isa-extensions".
+
 endmenu # "Boot options"
 
 config BUILTIN_DTB