MIPS: Alchemy: Rewrite UART setup and constants.
[sfrench/cifs-2.6.git] / arch / mips / alchemy / xxs1500 / board_setup.c
index febfb0fb0896dcd979ca52bc40ecf0fcb3bfcbe2..81e57fad07ab4bd5567bec068d70c0b18955b0fb 100644 (file)
@@ -66,13 +66,10 @@ void __init board_setup(void)
        au_writel(pin_func, SYS_PINFUNC);
 
        /* Enable UART */
-       au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
-       mdelay(10);
-       au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
-       mdelay(10);
-
-       /* Enable DTR = USB power up */
-       au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
+       alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
+       /* Enable DTR (MCR bit 0) = USB power up */
+       __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
+       wmb();
 
 #ifdef CONFIG_PCI
 #if defined(__MIPSEB__)