Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / qcom / msm8953.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index d44cfa0471e9a6f0e37c2244d0ff349aba44ddb3..b711cf9a6dc0313a810826a3f2a6139b50eafe9d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -766,10 +766,10 @@
                        #power-domain-cells = <1>;
                        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                                 <&sleep_clk>,
-                                <&dsi0_phy 1>,
-                                <&dsi0_phy 0>,
-                                <&dsi1_phy 1>,
-                                <&dsi1_phy 0>;
+                                <&mdss_dsi0_phy 1>,
+                                <&mdss_dsi0_phy 0>,
+                                <&mdss_dsi1_phy 1>,
+                                <&mdss_dsi1_phy 0>;
                        clock-names = "xo",
                                      "sleep",
                                      "dsi0pll",
@@ -851,20 +851,20 @@
                                        port@0 {
                                                reg = <0>;
                                                mdp5_intf1_out: endpoint {
-                                                       remote-endpoint = <&dsi0_in>;
+                                                       remote-endpoint = <&mdss_dsi0_in>;
                                                };
                                        };
 
                                        port@1 {
                                                reg = <1>;
                                                mdp5_intf2_out: endpoint {
-                                                       remote-endpoint = <&dsi1_in>;
+                                                       remote-endpoint = <&mdss_dsi1_in>;
                                                };
                                        };
                                };
                        };
 
-                       dsi0: dsi@1a94000 {
+                       mdss_dsi0: dsi@1a94000 {
                                compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
                                reg = <0x01a94000 0x400>;
                                reg-names = "dsi_ctrl";
@@ -874,8 +874,8 @@
 
                                assigned-clocks = <&gcc BYTE0_CLK_SRC>,
                                                  <&gcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&dsi0_phy 0>,
-                                                        <&dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
+                                                        <&mdss_dsi0_phy 1>;
 
                                clocks = <&gcc GCC_MDSS_MDP_CLK>,
                                         <&gcc GCC_MDSS_AHB_CLK>,
@@ -890,7 +890,7 @@
                                              "pixel",
                                              "core";
 
-                               phys = <&dsi0_phy>;
+                               phys = <&mdss_dsi0_phy>;
 
                                #address-cells = <1>;
                                #size-cells = <0>;
@@ -903,20 +903,20 @@
 
                                        port@0 {
                                                reg = <0>;
-                                               dsi0_in: endpoint {
+                                               mdss_dsi0_in: endpoint {
                                                        remote-endpoint = <&mdp5_intf1_out>;
                                                };
                                        };
 
                                        port@1 {
                                                reg = <1>;
-                                               dsi0_out: endpoint {
+                                               mdss_dsi0_out: endpoint {
                                                };
                                        };
                                };
                        };
 
-                       dsi0_phy: phy@1a94400 {
+                       mdss_dsi0_phy: phy@1a94400 {
                                compatible = "qcom,dsi-phy-14nm-8953";
                                reg = <0x01a94400 0x100>,
                                      <0x01a94500 0x300>,
@@ -934,7 +934,7 @@
                                status = "disabled";
                        };
 
-                       dsi1: dsi@1a96000 {
+                       mdss_dsi1: dsi@1a96000 {
                                compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
                                reg = <0x01a96000 0x400>;
                                reg-names = "dsi_ctrl";
@@ -944,8 +944,8 @@
 
                                assigned-clocks = <&gcc BYTE1_CLK_SRC>,
                                                  <&gcc PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&dsi1_phy 0>,
-                                                        <&dsi1_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi1_phy 0>,
+                                                        <&mdss_dsi1_phy 1>;
 
                                clocks = <&gcc GCC_MDSS_MDP_CLK>,
                                         <&gcc GCC_MDSS_AHB_CLK>,
@@ -960,7 +960,7 @@
                                              "pixel",
                                              "core";
 
-                               phys = <&dsi1_phy>;
+                               phys = <&mdss_dsi1_phy>;
 
                                status = "disabled";
 
@@ -970,20 +970,20 @@
 
                                        port@0 {
                                                reg = <0>;
-                                               dsi1_in: endpoint {
+                                               mdss_dsi1_in: endpoint {
                                                        remote-endpoint = <&mdp5_intf2_out>;
                                                };
                                        };
 
                                        port@1 {
                                                reg = <1>;
-                                               dsi1_out: endpoint {
+                                               mdss_dsi1_out: endpoint {
                                                };
                                        };
                                };
                        };
 
-                       dsi1_phy: phy@1a96400 {
+                       mdss_dsi1_phy: phy@1a96400 {
                                compatible = "qcom,dsi-phy-14nm-8953";
                                reg = <0x01a96400 0x100>,
                                      <0x01a96500 0x300>,
@@ -1002,7 +1002,7 @@
                        };
                };
 
-               apps_iommu: iommu@1e00000 {
+               apps_iommu: iommu@1e20000 {
                        compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
                        ranges  = <0 0x01e20000 0x20000>;
 
@@ -1276,6 +1276,19 @@
                        };
                };
 
+               blsp1_dma: dma-controller@7884000 {
+                       compatible = "qcom,bam-v1.7.0";
+                       reg = <0x07884000 0x1f000>;
+                       interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "bam_clk";
+                       num-channels = <12>;
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       qcom,num-ees = <4>;
+                       qcom,controlled-remotely;
+               };
+
                uart_0: serial@78af000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x078af000 0x200>;
@@ -1294,6 +1307,8 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
+                       dmas = <&blsp1_dma 4>, <&blsp1_dma 5>;
+                       dma-names = "tx", "rx";
 
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_1_default>;
@@ -1312,6 +1327,8 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
+                       dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
+                       dma-names = "tx", "rx";
 
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_2_default>;
@@ -1330,6 +1347,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
+                       dmas = <&blsp1_dma 8>, <&blsp1_dma 9>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_3_default>;
                        pinctrl-1 = <&i2c_3_sleep>;
@@ -1347,6 +1367,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
+                       dmas = <&blsp2_dma 10>, <&blsp2_dma 11>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_4_default>;
                        pinctrl-1 = <&i2c_4_sleep>;
@@ -1357,6 +1380,19 @@
                        status = "disabled";
                };
 
+               blsp2_dma: dma-controller@7ac4000 {
+                       compatible = "qcom,bam-v1.7.0";
+                       reg = <0x07ac4000 0x1f000>;
+                       interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP2_AHB_CLK>;
+                       clock-names = "bam_clk";
+                       num-channels = <12>;
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       qcom,num-ees = <4>;
+                       qcom,controlled-remotely;
+               };
+
                i2c_5: i2c@7af5000 {
                        compatible = "qcom,i2c-qup-v2.2.1";
                        reg = <0x07af5000 0x600>;
@@ -1364,6 +1400,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP2_AHB_CLK>;
+                       dmas = <&blsp2_dma 4>, <&blsp2_dma 5>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_5_default>;
                        pinctrl-1 = <&i2c_5_sleep>;
@@ -1381,6 +1420,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP2_AHB_CLK>;
+                       dmas = <&blsp2_dma 6>, <&blsp2_dma 7>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_6_default>;
                        pinctrl-1 = <&i2c_6_sleep>;
@@ -1398,6 +1440,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP2_AHB_CLK>;
+                       dmas = <&blsp2_dma 8>, <&blsp2_dma 9>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_7_default>;
                        pinctrl-1 = <&i2c_7_sleep>;
@@ -1415,6 +1460,9 @@
                        clock-names = "core", "iface";
                        clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP2_AHB_CLK>;
+                       dmas = <&blsp2_dma 10>, <&blsp2_dma 11>;
+                       dma-names = "tx", "rx";
+
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c_8_default>;
                        pinctrl-1 = <&i2c_8_sleep>;
@@ -1425,7 +1473,7 @@
                        status = "disabled";
                };
 
-               wcnss: remoteproc@a21b000 {
+               wcnss: remoteproc@a204000 {
                        compatible = "qcom,pronto-v3-pil", "qcom,pronto";
                        reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
                        reg-names = "ccu", "dxe", "pmu";
@@ -1507,8 +1555,8 @@
                timer@b120000 {
                        compatible = "arm,armv7-timer-mem";
                        reg = <0x0b120000 0x1000>;
-                       #address-cells = <0x01>;
-                       #size-cells = <0x01>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
                        ranges;
 
                        frame@b121000 {