clock-names = "apb_pclk";
};
- uart0: uart@101f1000 {
+ uart0: serial@101f1000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x101f1000 0x1000>;
interrupts = <12>;
clock-names = "uartclk", "apb_pclk";
};
- uart1: uart@101f2000 {
+ uart1: serial@101f2000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x101f2000 0x1000>;
interrupts = <13>;
clock-names = "uartclk", "apb_pclk";
};
- uart2: uart@101f3000 {
+ uart2: serial@101f3000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x101f3000 0x1000>;
interrupts = <14>;