arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel

Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index d61da3a62712f57bf1e2ae8eb95f998595403c47..2ca2d3dc8d6ce081ac2f0e9a238cb70060561bd0 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -143,8 +143,8 @@
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 98f0f4eb064976d432e9aa9b40635f5d66db6bca..a93148c2088fffb0e75558d50b877d9d376a75f1 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -248,8 +248,8 @@
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                spi2: spi@54006200 {
@@ -259,8 +259,8 @@
                        interrupts = <0 229 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi2>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 13>;
+                       resets = <&peri_rst 13>;
                };
 
                spi3: spi@54006300 {
@@ -270,8 +270,8 @@
                        interrupts = <0 230 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi3>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 14>;
+                       resets = <&peri_rst 14>;
                };
 
                serial0: serial@54006800 {

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 515d379016d1ad55e50e57bc859cd9fc172b3668..616835b38106a9c4376bc1a747312d7e78221c72 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -207,8 +207,8 @@
                        interrupts = <0 216 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_spi1>;
-                       clocks = <&peri_clk 11>;
-                       resets = <&peri_rst 11>;
+                       clocks = <&peri_clk 12>;
+                       resets = <&peri_rst 12>;
                };
 
                serial0: serial@54006800 {