riscv: dts: sophgo: remove address-cells from intc node

A recent submission [1] from Rob has added additionalProperties: false
to the interrupt-controller child node of RISC-V cpus, highlighting that
the new cv1800b DT has been incorrectly using #address-cells.
It has no child nodes, so #address-cells is not needed. Remove it.

Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/
Fixes: c3dffa879cca ("riscv: dts: sophgo: add initial CV1800B SoC device tree")
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index df40e87ee063292417622cd89c71a117ce38cb7c..aec6401a467b02a17d2bd25a369222bca815d83b 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -34,7 +34,6 @@
                        cpu0_intc: interrupt-controller {
                                compatible = "riscv,cpu-intc";
                                interrupt-controller;
-                               #address-cells = <0>;
                                #interrupt-cells = <1>;
                        };
                };