drm/tegra: falcon: Clarify address usage
authorThierry Reding <treding@nvidia.com>
Mon, 28 Oct 2019 12:37:16 +0000 (13:37 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 29 Oct 2019 14:04:36 +0000 (15:04 +0100)
Rename paddr -> iova and vaddr -> virt to make it clearer how these
addresses are used. This is important for a subsequent patch that makes
a distinction between the physical address (physical address of the
system memory from the CPU's point of view) and the IOVA (physical
address of the system memory from the device's point of view).

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/falcon.c
drivers/gpu/drm/tegra/falcon.h
drivers/gpu/drm/tegra/vic.c

index a5b25e4ecbd213ee14244e212af26dcef4d22070..56edef06c48e7f6bc7dd864ce5c01cfd207339c7 100644 (file)
@@ -58,17 +58,17 @@ static int falcon_copy_chunk(struct falcon *falcon,
 static void falcon_copy_firmware_image(struct falcon *falcon,
                                       const struct firmware *firmware)
 {
-       u32 *firmware_vaddr = falcon->firmware.vaddr;
+       u32 *virt = falcon->firmware.virt;
        size_t i;
 
        /* copy the whole thing taking into account endianness */
        for (i = 0; i < firmware->size / sizeof(u32); i++)
-               firmware_vaddr[i] = le32_to_cpu(((u32 *)firmware->data)[i]);
+               virt[i] = le32_to_cpu(((u32 *)firmware->data)[i]);
 }
 
 static int falcon_parse_firmware_image(struct falcon *falcon)
 {
-       struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.vaddr;
+       struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.virt;
        struct falcon_fw_os_header_v1 *os;
 
        /* endian problems would show up right here */
@@ -89,7 +89,7 @@ static int falcon_parse_firmware_image(struct falcon *falcon)
                return -EINVAL;
        }
 
-       os = falcon->firmware.vaddr + bin->os_header_offset;
+       os = falcon->firmware.virt + bin->os_header_offset;
 
        falcon->firmware.bin_data.size = bin->os_size;
        falcon->firmware.bin_data.offset = bin->os_data_offset;
@@ -138,7 +138,7 @@ int falcon_load_firmware(struct falcon *falcon)
 
 int falcon_init(struct falcon *falcon)
 {
-       falcon->firmware.vaddr = NULL;
+       falcon->firmware.virt = NULL;
 
        return 0;
 }
@@ -155,7 +155,7 @@ int falcon_boot(struct falcon *falcon)
        u32 value;
        int err;
 
-       if (!falcon->firmware.vaddr)
+       if (!falcon->firmware.virt)
                return -EINVAL;
 
        err = readl_poll_timeout(falcon->regs + FALCON_DMACTL, value,
@@ -168,7 +168,7 @@ int falcon_boot(struct falcon *falcon)
        falcon_writel(falcon, 0, FALCON_DMACTL);
 
        /* setup the address of the binary data so Falcon can access it later */
-       falcon_writel(falcon, (falcon->firmware.paddr +
+       falcon_writel(falcon, (falcon->firmware.iova +
                               falcon->firmware.bin_data.offset) >> 8,
                      FALCON_DMATRFBASE);
 
index 92491a1e90df7624e406da85054a37e734e2f7ce..c56ee32d92eec26e69ef60bbdeecee3d1205663b 100644 (file)
@@ -84,8 +84,9 @@ struct falcon_firmware {
        const struct firmware *firmware;
 
        /* Raw firmware data */
-       dma_addr_t paddr;
-       void *vaddr;
+       dma_addr_t iova;
+       dma_addr_t phys;
+       void *virt;
        size_t size;
 
        /* Parsed firmware information */
index 4345b8054617030a490c1953dad1671aea8ce4be..9444ba1839907594d06f9c6406751486fd1d6871 100644 (file)
@@ -133,9 +133,9 @@ static int vic_boot(struct vic *vic)
        if (err < 0)
                return err;
 
-       hdr = vic->falcon.firmware.vaddr;
+       hdr = vic->falcon.firmware.virt;
        fce_bin_data_offset = *(u32 *)(hdr + VIC_UCODE_FCE_DATA_OFFSET);
-       hdr = vic->falcon.firmware.vaddr +
+       hdr = vic->falcon.firmware.virt +
                *(u32 *)(hdr + VIC_UCODE_FCE_HEADER_OFFSET);
        fce_ucode_size = *(u32 *)(hdr + FCE_UCODE_SIZE_OFFSET);
 
@@ -143,7 +143,7 @@ static int vic_boot(struct vic *vic)
        falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE,
                              fce_ucode_size);
        falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_OFFSET,
-                             (vic->falcon.firmware.paddr + fce_bin_data_offset)
+                             (vic->falcon.firmware.iova + fce_bin_data_offset)
                                >> 8);
 
        err = falcon_wait_idle(&vic->falcon);
@@ -225,14 +225,17 @@ static int vic_exit(struct host1x_client *client)
        host1x_channel_put(vic->channel);
        host1x_client_iommu_detach(client);
 
-       if (client->group)
+       if (client->group) {
+               dma_unmap_single(vic->dev, vic->falcon.firmware.phys,
+                                vic->falcon.firmware.size, DMA_TO_DEVICE);
                tegra_drm_free(tegra, vic->falcon.firmware.size,
-                              vic->falcon.firmware.vaddr,
-                              vic->falcon.firmware.paddr);
-       else
+                              vic->falcon.firmware.virt,
+                              vic->falcon.firmware.iova);
+       } else {
                dma_free_coherent(vic->dev, vic->falcon.firmware.size,
-                                 vic->falcon.firmware.vaddr,
-                                 vic->falcon.firmware.paddr);
+                                 vic->falcon.firmware.virt,
+                                 vic->falcon.firmware.iova);
+       }
 
        return 0;
 }
@@ -246,12 +249,12 @@ static int vic_load_firmware(struct vic *vic)
 {
        struct host1x_client *client = &vic->client.base;
        struct tegra_drm *tegra = vic->client.drm;
-       dma_addr_t phys;
+       dma_addr_t iova;
        size_t size;
        void *virt;
        int err;
 
-       if (vic->falcon.firmware.vaddr)
+       if (vic->falcon.firmware.virt)
                return 0;
 
        err = falcon_read_firmware(&vic->falcon, vic->config->firmware);
@@ -261,17 +264,17 @@ static int vic_load_firmware(struct vic *vic)
        size = vic->falcon.firmware.size;
 
        if (!client->group) {
-               virt = dma_alloc_coherent(vic->dev, size, &phys, GFP_KERNEL);
+               virt = dma_alloc_coherent(vic->dev, size, &iova, GFP_KERNEL);
 
-               err = dma_mapping_error(vic->dev, phys);
+               err = dma_mapping_error(vic->dev, iova);
                if (err < 0)
                        return err;
        } else {
-               virt = tegra_drm_alloc(tegra, size, &phys);
+               virt = tegra_drm_alloc(tegra, size, &iova);
        }
 
-       vic->falcon.firmware.vaddr = virt;
-       vic->falcon.firmware.paddr = phys;
+       vic->falcon.firmware.virt = virt;
+       vic->falcon.firmware.iova = iova;
 
        err = falcon_load_firmware(&vic->falcon);
        if (err < 0)
@@ -283,35 +286,24 @@ static int vic_load_firmware(struct vic *vic)
         * knows what memory pages to flush the cache for.
         */
        if (client->group) {
+               dma_addr_t phys;
+
                phys = dma_map_single(vic->dev, virt, size, DMA_TO_DEVICE);
 
                err = dma_mapping_error(vic->dev, phys);
                if (err < 0)
                        goto cleanup;
 
-               /*
-                * If the DMA API mapped this through a bounce buffer, the
-                * dma_sync_single_for_device() call below will not be able
-                * to flush the caches for the right memory pages. Output a
-                * big warning in that case so that the DMA mask can be set
-                * properly and the bounce buffer avoided.
-                */
-               WARN(phys != vic->falcon.firmware.paddr,
-                    "check DMA mask setting for %s\n", dev_name(vic->dev));
+               vic->falcon.firmware.phys = phys;
        }
 
-       dma_sync_single_for_device(vic->dev, phys, size, DMA_TO_DEVICE);
-
-       if (client->group)
-               dma_unmap_single(vic->dev, phys, size, DMA_TO_DEVICE);
-
        return 0;
 
 cleanup:
        if (!client->group)
-               dma_free_coherent(vic->dev, size, virt, phys);
+               dma_free_coherent(vic->dev, size, virt, iova);
        else
-               tegra_drm_free(tegra, size, virt, phys);
+               tegra_drm_free(tegra, size, virt, iova);
 
        return err;
 }