dt-bindings: riscv: add sv57 mmu-type
authorConor Dooley <conor.dooley@microchip.com>
Mon, 24 Apr 2023 17:05:43 +0000 (18:05 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 26 Apr 2023 14:29:02 +0000 (07:29 -0700)
Dumping the dtb from new versions of QEMU warns that sv57 is an
undocumented mmu-type. The kernel has supported sv57 for about a year,
so bring it into the fold.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230424-rival-habitual-478567c516f0@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/cpus.yaml

index f24cf9601c6ea5f9bb06b9edae17eed16fdac1bd..9b512c1d93fe7d91194f0d18f3f360fed8b3d813 100644 (file)
@@ -65,6 +65,7 @@ properties:
       - riscv,sv32
       - riscv,sv39
       - riscv,sv48
+      - riscv,sv57
       - riscv,none
 
   riscv,cbom-block-size: