net: atlantic: move IS_CHIP_FEATURE to aq_hw.h
authorMark Starovoytov <mstarovoitov@marvell.com>
Thu, 30 Apr 2020 08:04:35 +0000 (11:04 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 1 May 2020 22:37:58 +0000 (15:37 -0700)
IS_CHIP feature will be used to differentiate between A1 and A2,
where necessary. Thus, move it to aq_hw.h, rename it and make
it accept the 'hw' pointer.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/aquantia/atlantic/aq_hw.h
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h

index c0dada1075cf484c4d06f5424f4f500c4050f80d..f420ef40b627886329e82fe21b4257a6a7f4cf5c 100644 (file)
@@ -136,6 +136,19 @@ enum aq_priv_flags {
                                 BIT(AQ_HW_LOOPBACK_PHYINT_SYS) |\
                                 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))
 
+#define ATL_HW_CHIP_MIPS         0x00000001U
+#define ATL_HW_CHIP_TPO2         0x00000002U
+#define ATL_HW_CHIP_RPF2         0x00000004U
+#define ATL_HW_CHIP_MPI_AQ       0x00000010U
+#define ATL_HW_CHIP_ATLANTIC     0x00800000U
+#define ATL_HW_CHIP_REVISION_A0  0x01000000U
+#define ATL_HW_CHIP_REVISION_B0  0x02000000U
+#define ATL_HW_CHIP_REVISION_B1  0x04000000U
+#define ATL_HW_CHIP_ANTIGUA      0x08000000U
+
+#define ATL_HW_IS_CHIP_FEATURE(_HW_, _F_) (!!(ATL_HW_CHIP_##_F_ & \
+       (_HW_)->chip_features))
+
 struct aq_hw_s {
        atomic_t flags;
        u8 rbl_enabled:1;
index 2dba8c277ecb5a060f08408a8df0801549d51f2e..eee265b4415aaaeca746167d41832aa97537eb4e 100644 (file)
@@ -267,7 +267,7 @@ static int hw_atl_a0_hw_init_tx_path(struct aq_hw_s *self)
        hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);
 
        /* misc */
-       aq_hw_write_reg(self, 0x00007040U, IS_CHIP_FEATURE(TPO2) ?
+       aq_hw_write_reg(self, 0x00007040U, ATL_HW_IS_CHIP_FEATURE(self, TPO2) ?
                        0x00010000U : 0x00000000U);
        hw_atl_tdm_tx_dca_en_set(self, 0U);
        hw_atl_tdm_tx_dca_mode_set(self, 0U);
index 4e2e4eef028d0c5993e109f9fbe58f1dd8a1e933..3b42045b9c7df58e3dab660bdafc4c8b1c50210e 100644 (file)
@@ -324,7 +324,7 @@ static int hw_atl_b0_hw_init_tx_path(struct aq_hw_s *self)
        hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);
 
        /* misc */
-       aq_hw_write_reg(self, 0x00007040U, IS_CHIP_FEATURE(TPO2) ?
+       aq_hw_write_reg(self, 0x00007040U, ATL_HW_IS_CHIP_FEATURE(self, TPO2) ?
                        0x00010000U : 0x00000000U);
        hw_atl_tdm_tx_dca_en_set(self, 0U);
        hw_atl_tdm_tx_dca_mode_set(self, 0U);
@@ -372,8 +372,8 @@ static int hw_atl_b0_hw_init_rx_path(struct aq_hw_s *self)
        hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);
 
        /* misc */
-       aq_hw_write_reg(self, 0x00005040U,
-                       IS_CHIP_FEATURE(RPF2) ? 0x000F0000U : 0x00000000U);
+       aq_hw_write_reg(self, 0x00005040U, ATL_HW_IS_CHIP_FEATURE(self, RPF2) ?
+                       0x000F0000U : 0x00000000U);
 
        hw_atl_rpfl2broadcast_flr_act_set(self, 1U);
        hw_atl_rpfl2broadcast_count_threshold_set(self, 0xFFFFU & (~0U / 256U));
index bd1712ca9ef20eca9ceb5accf1f08d338d0eb5a2..20655a2170cc0b93e4e43b2bab4e094eeb60ca3d 100644 (file)
@@ -309,7 +309,7 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
        for (++cnt; --cnt && !err;) {
                aq_hw_write_reg(self, HW_ATL_MIF_CMD, 0x00008000U);
 
-               if (IS_CHIP_FEATURE(REVISION_B1))
+               if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1))
                        err = readx_poll_timeout_atomic(hw_atl_utils_mif_addr_get,
                                                        self, val, val != a,
                                                        1U, 1000U);
@@ -405,7 +405,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 addr, u32 *p,
        if (err < 0)
                goto err_exit;
 
-       if (IS_CHIP_FEATURE(REVISION_B1))
+       if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1))
                err = hw_atl_utils_write_b1_mbox(self, addr, p, cnt, area);
        else
                err = hw_atl_utils_write_b0_mbox(self, addr, p, cnt);
@@ -497,7 +497,7 @@ int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)
        struct aq_hw_atl_utils_fw_rpc_tid_s sw;
        int err = 0;
 
-       if (!IS_CHIP_FEATURE(MIPS)) {
+       if (!ATL_HW_IS_CHIP_FEATURE(self, MIPS)) {
                err = -1;
                goto err_exit;
        }
@@ -603,7 +603,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
        if (err < 0)
                goto err_exit;
 
-       if (IS_CHIP_FEATURE(REVISION_A0)) {
+       if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_A0)) {
                unsigned int mtu = self->aq_nic_cfg ?
                                        self->aq_nic_cfg->mtu : 1514U;
                pmbox->stats.ubrc = pmbox->stats.uprc * mtu;
@@ -802,22 +802,24 @@ void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p)
        u32 mif_rev = val & 0xFFU;
        u32 chip_features = 0U;
 
+       chip_features |= ATL_HW_CHIP_ATLANTIC;
+
        if ((0xFU & mif_rev) == 1U) {
-               chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 |
-                       HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
-                       HAL_ATLANTIC_UTILS_CHIP_MIPS;
+               chip_features |= ATL_HW_CHIP_REVISION_A0 |
+                       ATL_HW_CHIP_MPI_AQ |
+                       ATL_HW_CHIP_MIPS;
        } else if ((0xFU & mif_rev) == 2U) {
-               chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 |
-                       HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
-                       HAL_ATLANTIC_UTILS_CHIP_MIPS |
-                       HAL_ATLANTIC_UTILS_CHIP_TPO2 |
-                       HAL_ATLANTIC_UTILS_CHIP_RPF2;
+               chip_features |= ATL_HW_CHIP_REVISION_B0 |
+                       ATL_HW_CHIP_MPI_AQ |
+                       ATL_HW_CHIP_MIPS |
+                       ATL_HW_CHIP_TPO2 |
+                       ATL_HW_CHIP_RPF2;
        } else if ((0xFU & mif_rev) == 0xAU) {
-               chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 |
-                       HAL_ATLANTIC_UTILS_CHIP_MPI_AQ |
-                       HAL_ATLANTIC_UTILS_CHIP_MIPS |
-                       HAL_ATLANTIC_UTILS_CHIP_TPO2 |
-                       HAL_ATLANTIC_UTILS_CHIP_RPF2;
+               chip_features |= ATL_HW_CHIP_REVISION_B1 |
+                       ATL_HW_CHIP_MPI_AQ |
+                       ATL_HW_CHIP_MIPS |
+                       ATL_HW_CHIP_TPO2 |
+                       ATL_HW_CHIP_RPF2;
        }
 
        *p = chip_features;
index 086627a96746dbac70f0371f33cd53cd5757e4a0..5513254642b36f2bc97442001d03234b9f317651 100644 (file)
@@ -406,17 +406,6 @@ enum hw_atl_rx_ctrl_registers_l3l4 {
 #define HW_ATL_GET_REG_LOCATION_FL3L4(location) \
        ((location) - AQ_RX_FIRST_LOC_FL3L4)
 
-#define HAL_ATLANTIC_UTILS_CHIP_MIPS         0x00000001U
-#define HAL_ATLANTIC_UTILS_CHIP_TPO2         0x00000002U
-#define HAL_ATLANTIC_UTILS_CHIP_RPF2         0x00000004U
-#define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ       0x00000010U
-#define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0  0x01000000U
-#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0  0x02000000U
-#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B1  0x04000000U
-
-#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
-       self->chip_features)
-
 enum hal_atl_utils_fw_state_e {
        MPI_DEINIT = 0,
        MPI_RESET = 1,