drm/amdgpu: correct mca debugfs dump reg list
authorYang Wang <kevinyang.wang@amd.com>
Wed, 8 Nov 2023 12:35:52 +0000 (20:35 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 9 Nov 2023 22:02:32 +0000 (17:02 -0500)
avoid driver to touch invalid mca reg.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

index 65926f3c708a6f56fbb4bfd364eca7a6c281f9c0..cf33eb219e25741bcbc27bda849b3642c70bd143 100644 (file)
@@ -389,14 +389,21 @@ static int amdgpu_mca_smu_debug_mode_set(void *data, u64 val)
 static void mca_dump_entry(struct seq_file *m, struct mca_bank_entry *entry)
 {
        int i, idx = entry->idx;
+       int reg_idx_array[] = {
+               MCA_REG_IDX_STATUS,
+               MCA_REG_IDX_ADDR,
+               MCA_REG_IDX_MISC0,
+               MCA_REG_IDX_IPID,
+               MCA_REG_IDX_SYND,
+       };
 
        seq_printf(m, "mca entry[%d].type: %s\n", idx, entry->type == AMDGPU_MCA_ERROR_TYPE_UE ? "UE" : "CE");
        seq_printf(m, "mca entry[%d].ip: %d\n", idx, entry->ip);
        seq_printf(m, "mca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",
                   idx, entry->info.socket_id, entry->info.aid, entry->info.hwid, entry->info.mcatype);
 
-       for (i = 0; i < ARRAY_SIZE(entry->regs); i++)
-               seq_printf(m, "mca entry[%d].regs[%d]: 0x%016llx\n", idx, i, entry->regs[i]);
+       for (i = 0; i < ARRAY_SIZE(reg_idx_array); i++)
+               seq_printf(m, "mca entry[%d].regs[%d]: 0x%016llx\n", idx, reg_idx_array[i], entry->regs[reg_idx_array[i]]);
 }
 
 static int mca_dump_show(struct seq_file *m, enum amdgpu_mca_error_type type)