drm/i915/display: move hti under display sub-struct
authorJani Nikula <jani.nikula@intel.com>
Wed, 9 Nov 2022 14:42:07 +0000 (16:42 +0200)
committerJani Nikula <jani.nikula@intel.com>
Thu, 17 Nov 2022 14:12:56 +0000 (16:12 +0200)
Move display hti/hdport related members under drm_i915_private display
sub-struct.

Prefer adding anonymous sub-structs even for single members that aren't
our own structs.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221109144209.3624739-2-jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_display_core.h
drivers/gpu/drm/i915/display/intel_hti.c
drivers/gpu/drm/i915/i915_drv.h

index 337d8e08ba434a663fe0f14779c2b71abbd3cdee..d851d401211fd2ef9580f4ef96a9f19e8f5b33a3 100644 (file)
@@ -370,6 +370,16 @@ struct intel_display {
                struct mutex comp_mutex;
        } hdcp;
 
+       struct {
+               /*
+                * HTI (aka HDPORT) state read during initial hw readout. Most
+                * platforms don't have HTI, so this will just stay 0. Those
+                * that do will use this later to figure out which PLLs and PHYs
+                * are unavailable for driver usage.
+                */
+               u32 state;
+       } hti;
+
        struct {
                struct i915_power_domains domains;
 
index 3dfd7203f01c95ecd973dfb39ef9078b9ae37aff..12a1f4ce1a77c158c0ef0bff6af6b17bacc606f8 100644 (file)
@@ -16,23 +16,23 @@ void intel_hti_init(struct drm_i915_private *i915)
         * any display resources before we create our display outputs.
         */
        if (INTEL_INFO(i915)->display.has_hti)
-               i915->hti_state = intel_de_read(i915, HDPORT_STATE);
+               i915->display.hti.state = intel_de_read(i915, HDPORT_STATE);
 }
 
 bool intel_hti_uses_phy(struct drm_i915_private *i915, enum phy phy)
 {
-       return i915->hti_state & HDPORT_ENABLED &&
-               i915->hti_state & HDPORT_DDI_USED(phy);
+       return i915->display.hti.state & HDPORT_ENABLED &&
+               i915->display.hti.state & HDPORT_DDI_USED(phy);
 }
 
 u32 intel_hti_dpll_mask(struct drm_i915_private *i915)
 {
-       if (!(i915->hti_state & HDPORT_ENABLED))
+       if (!(i915->display.hti.state & HDPORT_ENABLED))
                return 0;
 
        /*
         * Note: This is subtle. The values must coincide with what's defined
         * for the platform.
         */
-       return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->hti_state);
+       return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->display.hti.state);
 }
index 05b3300cc4edfee3b4b790ea5c120a794917fb97..bb88aee2af2577bdc31252c6dc5ff17e9cc4de20 100644 (file)
@@ -300,14 +300,6 @@ struct drm_i915_private {
 
        struct intel_l3_parity l3_parity;
 
-       /*
-        * HTI (aka HDPORT) state read during initial hw readout.  Most
-        * platforms don't have HTI, so this will just stay 0.  Those that do
-        * will use this later to figure out which PLLs and PHYs are unavailable
-        * for driver usage.
-        */
-       u32 hti_state;
-
        /*
         * edram size in MB.
         * Cannot be determined by PCIID. You must always read a register.