drm/i915: Check for FRL training before DP Link training

This patch calls functions to check FRL training requirements
for an HDMI2.1 sink, when connected through PCON.
The call is made before the DP link training. In case FRL is not
required or failure during FRL training, the TMDS mode is selected
for the pcon.

v2: moved check_frl_training() just after FEC READY, before
starting DP link training.

v3: rebase

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-11-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 92940a0c5ef8fa77c2d5664fcd2d40b864416d2f..fd39d3966914f8efc0c3a27a2757a491e3ef62c1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3651,6 +3651,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
         */
        intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
 
+       intel_dp_check_frl_training(intel_dp);
+
        /*
         * 7.i Follow DisplayPort specification training sequence (see notes for
         *     failure handling)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 26f82e38ed05a18678aa887ed8422bf84d507a16..b8dc247dfd7199a53ee7fccdf11eee56c76cc601 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4252,6 +4252,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
 
        intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
        intel_dp_configure_protocol_converter(intel_dp);
+       intel_dp_check_frl_training(intel_dp);
        intel_dp_start_link_train(intel_dp, pipe_config);
        intel_dp_stop_link_train(intel_dp, pipe_config);
 
@@ -6173,6 +6174,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
                    !intel_dp_mst_is_master_trans(crtc_state))
                        continue;
 
+               intel_dp_check_frl_training(intel_dp);
                intel_dp_start_link_train(intel_dp, crtc_state);
                intel_dp_stop_link_train(intel_dp, crtc_state);
                break;