dmaengine: jz4780: Fix an endian bug in IRQ handler

The "pending" variable was a u32 but we cast it to an unsigned long
pointer when we do the for_each_set_bit() loop.  The problem is that on
big endian 64bit systems that results in an out of bounds read.

Fixes: 4e4106f5e942 ("dmaengine: jz4780: Fix transfers being ACKed too soon")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index 263bee76ef0d4697106f6b73497abc51bc7388e6..6b8c4c458e8a39a0b9500804a3c0a4cb8f6e5839 100644 (file)
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -718,12 +718,13 @@ static irqreturn_t jz4780_dma_irq_handler(int irq, void *data)
 {
        struct jz4780_dma_dev *jzdma = data;
        unsigned int nb_channels = jzdma->soc_data->nb_channels;
-       uint32_t pending, dmac;
+       unsigned long pending;
+       uint32_t dmac;
        int i;
 
        pending = jz4780_dma_ctrl_readl(jzdma, JZ_DMA_REG_DIRQP);
 
-       for_each_set_bit(i, (unsigned long *)&pending, nb_channels) {
+       for_each_set_bit(i, &pending, nb_channels) {
                if (jz4780_dma_chan_irq(jzdma, &jzdma->chan[i]))
                        pending &= ~BIT(i);
        }