arm64: dts: ti: minor whitespace cleanup around '='
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 2 Jul 2023 18:52:21 +0000 (20:52 +0200)
committerNishanth Menon <nm@ti.com>
Tue, 11 Jul 2023 13:41:44 +0000 (08:41 -0500)
The DTS code coding style expects exactly one space before and after '='
sign.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230702185221.44319-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am62-main.dtsi
arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi

index 2488e3a537fe4d0acad4ee18fd2d77861e1b59b6..4a1dab9e40a0e271faee554081bc8e181da3011c 100644 (file)
 
                usb0: usb@31000000 {
                        compatible = "snps,dwc3";
-                       reg =<0x00 0x31000000 0x00 0x50000>;
+                       reg = <0x00 0x31000000 0x00 0x50000>;
                        interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
                                     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
                        interrupt-names = "host", "peripheral";
 
                usb1: usb@31100000 {
                        compatible = "snps,dwc3";
-                       reg =<0x00 0x31100000 0x00 0x50000>;
+                       reg = <0x00 0x31100000 0x00 0x50000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
                                     <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
                        interrupt-names = "host", "peripheral";
index 589bf998bc5281bf564135b147ffef0810976585..7c1402b0fa2dbc2fe38a6de3631d214fb29ad961 100644 (file)
@@ -14,7 +14,7 @@
 #include "k3-am625.dtsi"
 
 / {
-       compatible =  "beagle,am625-beagleplay", "ti,am625";
+       compatible = "beagle,am625-beagleplay", "ti,am625";
        model = "BeagleBoard.org BeaglePlay";
 
        aliases {
index 8b315cc61550c70bc2a6f96b5855717c88d1a3a7..8397cb80f5596a54068be0f99a7face2a77159aa 100644 (file)
                reg-names = "debug_messages";
                ti,host-id = <12>;
                mbox-names = "rx", "tx";
-               mboxes= <&secure_proxy_main 12>,
-                       <&secure_proxy_main 13>;
+               mboxes = <&secure_proxy_main 12>,
+                        <&secure_proxy_main 13>;
 
                k3_pds: power-controller {
                        compatible = "ti,sci-pm-domain";
 
                usb0: usb@31000000 {
                        compatible = "snps,dwc3";
-                       reg =<0x00 0x31000000 0x00 0x50000>;
+                       reg = <0x00 0x31000000 0x00 0x50000>;
                        interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
                                     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
                        interrupt-names = "host", "peripheral";
 
                usb1: usb@31100000 {
                        compatible = "snps,dwc3";
-                       reg =<0x00 0x31100000 0x00 0x50000>;
+                       reg = <0x00 0x31100000 0x00 0x50000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
                                     <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
                        interrupt-names = "host", "peripheral";
index ecc0e13331c41cff5e3b429fd3764f0e3827823b..d2cca618273825df56c77490a9df06b4e6b20369 100644 (file)
@@ -13,7 +13,7 @@
 #include "k3-am62a7.dtsi"
 
 / {
-       compatible =  "ti,am62a7-sk", "ti,am62a7";
+       compatible = "ti,am62a7-sk", "ti,am62a7";
        model = "Texas Instruments AM62A7 SK";
 
        aliases {
index 3f8ff2589842640be98fd0d809d45dd502d609d1..791c6b38993dc92ae2374069d6c0f8f5282f610c 100644 (file)
 
                ringacc: ringacc@3c000000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x0 0x3c000000 0x0 0x400000>,
-                               <0x0 0x38000000 0x0 0x400000>,
-                               <0x0 0x31120000 0x0 0x100>,
-                               <0x0 0x33000000 0x0 0x40000>;
+                       reg = <0x0 0x3c000000 0x0 0x400000>,
+                             <0x0 0x38000000 0x0 0x400000>,
+                             <0x0 0x31120000 0x0 0x100>,
+                             <0x0 0x33000000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <818>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                main_udmap: dma-controller@31150000 {
                        compatible = "ti,am654-navss-main-udmap";
-                       reg =   <0x0 0x31150000 0x0 0x100>,
-                               <0x0 0x34000000 0x0 0x100000>,
-                               <0x0 0x35000000 0x0 0x100000>;
+                       reg = <0x0 0x31150000 0x0 0x100>,
+                             <0x0 0x34000000 0x0 0x100000>,
+                             <0x0 0x35000000 0x0 0x100000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&inta_main_udmass>;
                        #dma-cells = <1>;
 
        dss: dss@4a00000 {
                compatible = "ti,am65x-dss";
-               reg =   <0x0 0x04a00000 0x0 0x1000>, /* common */
-                       <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
-                       <0x0 0x04a06000 0x0 0x1000>, /* vid */
-                       <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
-                       <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
-                       <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
-                       <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
+               reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
+                     <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
+                     <0x0 0x04a06000 0x0 0x1000>, /* vid */
+                     <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
+                     <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
+                     <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
+                     <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
                reg-names = "common", "vidl1", "vid",
                        "ovr1", "ovr2", "vp1", "vp2";
 
index b7a4b5a89aaf144e01aba0ca368a936479e56312..7b1f94a89eca8ea4a4e12576fbd319821bc61c82 100644 (file)
 
                mcu_ringacc: ringacc@2b800000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x0 0x2b800000 0x0 0x400000>,
-                               <0x0 0x2b000000 0x0 0x400000>,
-                               <0x0 0x28590000 0x0 0x100>,
-                               <0x0 0x2a500000 0x0 0x40000>;
+                       reg = <0x0 0x2b800000 0x0 0x400000>,
+                             <0x0 0x2b000000 0x0 0x400000>,
+                             <0x0 0x28590000 0x0 0x100>,
+                             <0x0 0x2a500000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <286>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                mcu_udmap: dma-controller@285c0000 {
                        compatible = "ti,am654-navss-mcu-udmap";
-                       reg =   <0x0 0x285c0000 0x0 0x100>,
-                               <0x0 0x2a800000 0x0 0x40000>,
-                               <0x0 0x2aa00000 0x0 0x40000>;
+                       reg = <0x0 0x285c0000 0x0 0x100>,
+                             <0x0 0x2a800000 0x0 0x40000>,
+                             <0x0 0x2aa00000 0x0 0x40000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&inta_main_udmass>;
                        #dma-cells = <1>;
index ac62bbc1660d51425b3b8296b285a69788e19b55..6eaade5aeb423c876ad0f6abeb98eec2af1f03da 100644 (file)
 
                main_ringacc: ringacc@3c000000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x00 0x3c000000 0x00 0x400000>,
-                               <0x00 0x38000000 0x00 0x400000>,
-                               <0x00 0x31120000 0x00 0x100>,
-                               <0x00 0x33000000 0x00 0x40000>;
+                       reg = <0x00 0x3c000000 0x00 0x400000>,
+                             <0x00 0x38000000 0x00 0x400000>,
+                             <0x00 0x31120000 0x00 0x100>,
+                             <0x00 0x33000000 0x00 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <1024>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                main_udmap: dma-controller@31150000 {
                        compatible = "ti,j721e-navss-main-udmap";
-                       reg =   <0x00 0x31150000 0x00 0x100>,
-                               <0x00 0x34000000 0x00 0x100000>,
-                               <0x00 0x35000000 0x00 0x100000>;
+                       reg = <0x00 0x31150000 0x00 0x100>,
+                             <0x00 0x34000000 0x00 0x100000>,
+                             <0x00 0x35000000 0x00 0x100000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&main_udmass_inta>;
                        #dma-cells = <1>;
index c5e4c41effd18c25e102082c41079b625fd6adba..ee7860913c387db5318f5497b2bdc05b37783230 100644 (file)
 
                mcu_ringacc: ringacc@2b800000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x00 0x2b800000 0x00 0x400000>,
-                               <0x00 0x2b000000 0x00 0x400000>,
-                               <0x00 0x28590000 0x00 0x100>,
-                               <0x00 0x2a500000 0x00 0x40000>;
+                       reg = <0x00 0x2b800000 0x00 0x400000>,
+                             <0x00 0x2b000000 0x00 0x400000>,
+                             <0x00 0x28590000 0x00 0x100>,
+                             <0x00 0x2a500000 0x00 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <286>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                mcu_udmap: dma-controller@285c0000 {
                        compatible = "ti,j721e-navss-mcu-udmap";
-                       reg =   <0x00 0x285c0000 0x00 0x100>,
-                               <0x00 0x2a800000 0x00 0x40000>,
-                               <0x00 0x2aa00000 0x00 0x40000>;
+                       reg = <0x00 0x285c0000 0x00 0x100>,
+                             <0x00 0x2a800000 0x00 0x40000>,
+                             <0x00 0x2aa00000 0x00 0x40000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&main_udmass_inta>;
                        #dma-cells = <1>;
index 2ded1ee1a85410b33fbc2d90a096be2b0f574353..649628685c32d57bbd25d48d5c6d41d1a0ec53a1 100644 (file)
 
                main_ringacc: ringacc@3c000000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x0 0x3c000000 0x0 0x400000>,
-                               <0x0 0x38000000 0x0 0x400000>,
-                               <0x0 0x31120000 0x0 0x100>,
-                               <0x0 0x33000000 0x0 0x40000>;
+                       reg = <0x0 0x3c000000 0x0 0x400000>,
+                             <0x0 0x38000000 0x0 0x400000>,
+                             <0x0 0x31120000 0x0 0x100>,
+                             <0x0 0x33000000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <1024>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                main_udmap: dma-controller@31150000 {
                        compatible = "ti,j721e-navss-main-udmap";
-                       reg =   <0x0 0x31150000 0x0 0x100>,
-                               <0x0 0x34000000 0x0 0x100000>,
-                               <0x0 0x35000000 0x0 0x100000>;
+                       reg = <0x0 0x31150000 0x0 0x100>,
+                             <0x0 0x34000000 0x0 0x100000>,
+                             <0x0 0x35000000 0x0 0x100000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&main_udmass_inta>;
                        #dma-cells = <1>;
                        "vp1", "vp2", "vp3", "vp4",
                        "wb";
 
-               clocks =        <&k3_clks 152 0>,
-                               <&k3_clks 152 1>,
-                               <&k3_clks 152 4>,
-                               <&k3_clks 152 9>,
-                               <&k3_clks 152 13>;
+               clocks = <&k3_clks 152 0>,
+                        <&k3_clks 152 1>,
+                        <&k3_clks 152 4>,
+                        <&k3_clks 152 9>,
+                        <&k3_clks 152 13>;
                clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
 
                power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
index ea5b9e104491f408e31f67c104329738184997b6..c1b6f8d7d1898a36e0c50700dcc62e38d335f6fb 100644 (file)
 
                mcu_ringacc: ringacc@2b800000 {
                        compatible = "ti,am654-navss-ringacc";
-                       reg =   <0x0 0x2b800000 0x0 0x400000>,
-                               <0x0 0x2b000000 0x0 0x400000>,
-                               <0x0 0x28590000 0x0 0x100>,
-                               <0x0 0x2a500000 0x0 0x40000>;
+                       reg = <0x0 0x2b800000 0x0 0x400000>,
+                             <0x0 0x2b000000 0x0 0x400000>,
+                             <0x0 0x28590000 0x0 0x100>,
+                             <0x0 0x2a500000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
                        ti,num-rings = <286>;
                        ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 
                mcu_udmap: dma-controller@285c0000 {
                        compatible = "ti,j721e-navss-mcu-udmap";
-                       reg =   <0x0 0x285c0000 0x0 0x100>,
-                               <0x0 0x2a800000 0x0 0x40000>,
-                               <0x0 0x2aa00000 0x0 0x40000>;
+                       reg = <0x0 0x285c0000 0x0 0x100>,
+                             <0x0 0x2a800000 0x0 0x40000>,
+                             <0x0 0x2aa00000 0x0 0x40000>;
                        reg-names = "gcfg", "rchanrt", "tchanrt";
                        msi-parent = <&main_udmass_inta>;
                        #dma-cells = <1>;
index 2ea0adae6832f7f882f8911f9e7c97233e1a40c5..11f163e5cadf9ec90661256396814877319c3a77 100644 (file)
                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 140 1>, <&k3_clks 140 2>;
-               clock-names =  "clk_ahb", "clk_xin";
+               clock-names = "clk_ahb", "clk_xin";
                assigned-clocks = <&k3_clks 140 2>;
                assigned-clock-parents = <&k3_clks 140 3>;
                bus-width = <8>;
                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 141 3>, <&k3_clks 141 4>;
-               clock-names =  "clk_ahb", "clk_xin";
+               clock-names = "clk_ahb", "clk_xin";
                assigned-clocks = <&k3_clks 141 4>;
                assigned-clock-parents = <&k3_clks 141 5>;
                bus-width = <4>;