drm/panfrost: Don't reset the GPU on job faults unless we really have to
authorBoris Brezillon <boris.brezillon@collabora.com>
Wed, 30 Jun 2021 06:27:48 +0000 (08:27 +0200)
committerBoris Brezillon <boris.brezillon@collabora.com>
Thu, 1 Jul 2021 06:53:35 +0000 (08:53 +0200)
If we can recover from a fault without a reset there's no reason to
issue one.

v3:
* Drop the mention of Valhall requiring a reset on JOB_BUS_FAULT
* Set the fence error to -EINVAL instead of having per-exception
  error codes

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210630062751.2832545-14-boris.brezillon@collabora.com
drivers/gpu/drm/panfrost/panfrost_device.c
drivers/gpu/drm/panfrost/panfrost_device.h
drivers/gpu/drm/panfrost/panfrost_job.c

index cd76d2ff5034464ca16af07f34dec776193ab9de..bd9b7be63b0f9312f9c10eb615d72efe61e6dbf6 100644 (file)
@@ -379,6 +379,15 @@ const char *panfrost_exception_name(u32 exception_code)
        return panfrost_exception_infos[exception_code].name;
 }
 
+bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
+                                   u32 exception_code)
+{
+       /* Right now, none of the GPU we support need a reset, but this
+        * might change.
+        */
+       return false;
+}
+
 void panfrost_device_reset(struct panfrost_device *pfdev)
 {
        panfrost_gpu_soft_reset(pfdev);
index cb5aadf7ae90fc0167630926c24adc78ebf54cf3..68e93b7e5b619e6951e8011a7826cf8543c1da12 100644 (file)
@@ -245,6 +245,8 @@ enum drm_panfrost_exception_type {
 };
 
 const char *panfrost_exception_name(u32 exception_code);
+bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
+                                   u32 exception_code);
 
 static inline void
 panfrost_device_schedule_reset(struct panfrost_device *pfdev)
index 11ff33841caf19627eac9fc8b9d6795f33c8d15b..cf5f9e8b2a2756772f18c211983ddfd1819a087d 100644 (file)
@@ -482,14 +482,26 @@ static void panfrost_job_handle_irq(struct panfrost_device *pfdev, u32 status)
                job_write(pfdev, JOB_INT_CLEAR, mask);
 
                if (status & JOB_INT_MASK_ERR(j)) {
+                       u32 js_status = job_read(pfdev, JS_STATUS(j));
+
                        job_write(pfdev, JS_COMMAND_NEXT(j), JS_COMMAND_NOP);
 
                        dev_err(pfdev->dev, "js fault, js=%d, status=%s, head=0x%x, tail=0x%x",
                                j,
-                               panfrost_exception_name(job_read(pfdev, JS_STATUS(j))),
+                               panfrost_exception_name(js_status),
                                job_read(pfdev, JS_HEAD_LO(j)),
                                job_read(pfdev, JS_TAIL_LO(j)));
-                       drm_sched_fault(&pfdev->js->queue[j].sched);
+
+                       /* If we need a reset, signal it to the timeout
+                        * handler, otherwise, update the fence error field and
+                        * signal the job fence.
+                        */
+                       if (panfrost_exception_needs_reset(pfdev, js_status)) {
+                               drm_sched_fault(&pfdev->js->queue[j].sched);
+                       } else {
+                               dma_fence_set_error(pfdev->jobs[j]->done_fence, -EINVAL);
+                               status |= JOB_INT_MASK_DONE(j);
+                       }
                }
 
                if (status & JOB_INT_MASK_DONE(j)) {