drm/gma500/cdv: Add and hook up chip op for watermarks

Add a callback hook to the chip ops struct to allow chips to have their
specific fifo watermark update function. Currently only cdv actually
tries to set wms based on crtc configuration but if/when the other chips
needs it we can attach a callback for them as well.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>

diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c
index daa45b5b3a4523ae3555c1e1aff95bedde1db33a..747d903fe49f33f3bb3f5c945bc48b57a4e29dbd 100644 (file)
--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -656,4 +656,5 @@ const struct psb_ops cdv_chip_ops = {
        .restore_regs = cdv_restore_display_registers,
        .power_down = cdv_power_down,
        .power_up = cdv_power_up,
+       .update_wm = cdv_update_wm,
 };

diff --git a/drivers/gpu/drm/gma500/cdv_device.h b/drivers/gpu/drm/gma500/cdv_device.h
index 602406bb6d0f70301f00a8e6695f4a2c4df3a3c7..9e4805627450202136be76336b62fecd19237f71 100644 (file)
--- a/drivers/gpu/drm/gma500/cdv_device.h
+++ b/drivers/gpu/drm/gma500/cdv_device.h
@@ -26,3 +26,4 @@ extern void cdv_hdmi_init(struct drm_device *dev, struct psb_intel_mode_device *
                        int reg);
 extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
                                             struct drm_crtc *crtc);
+extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc);

diff --git a/drivers/gpu/drm/gma500/cdv_intel_display.c b/drivers/gpu/drm/gma500/cdv_intel_display.c
index ee8a502348ceac125bf5de50454e27e49c502890..feacbbaabf14fc399c16a1ec072805e23b2b98cb 100644 (file)
--- a/drivers/gpu/drm/gma500/cdv_intel_display.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
@@ -532,7 +532,7 @@ void cdv_intel_disable_self_refresh(struct drm_device *dev)
 
 }
 
-void cdv_intel_update_watermark(struct drm_device *dev, struct drm_crtc *crtc)
+void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc)
 {
 
        if (cdv_intel_single_pipe_active(dev)) {

diff --git a/drivers/gpu/drm/gma500/gma_display.c b/drivers/gpu/drm/gma500/gma_display.c
index cd253caf5672db95ac427fe4de4aa855e601349b..fe972c930c2c5cc4c6c11f304435e995eca7c7f9 100644 (file)
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -321,7 +321,7 @@ void gma_crtc_dpms(struct drm_crtc *crtc, int mode)
        }
 
        if (IS_CDV(dev))
-               cdv_intel_update_watermark(dev, crtc);
+               dev_priv->ops->update_wm(dev, crtc);
 
        /* Set FIFO watermarks */
        REG_WRITE(DSPARB, 0x3F3E);

diff --git a/drivers/gpu/drm/gma500/gma_display.h b/drivers/gpu/drm/gma500/gma_display.h
index 1044c165c71494248ac8a0ff067eacd20b9db329..9a4e8941bd253ed0c71b4d0f11b559759d31c878 100644 (file)
--- a/drivers/gpu/drm/gma500/gma_display.h
+++ b/drivers/gpu/drm/gma500/gma_display.h
@@ -103,6 +103,4 @@ extern bool gma_find_best_pll(const struct gma_limit_t *limit,
 
 /* Cedarview specific functions */
 extern void cdv_intel_disable_self_refresh(struct drm_device *dev);
-extern void cdv_intel_update_watermark(struct drm_device *dev,
-                                      struct drm_crtc *crtc);
 #endif

diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index ed1e567b7e3b4837b1a23735c16ce58fa6bf6f5c..effd69502be539332b79ecb63ecc9c8d0cb30d3d 100644 (file)
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -695,6 +695,7 @@ struct psb_ops {
        int (*restore_regs)(struct drm_device *dev);
        int (*power_up)(struct drm_device *dev);
        int (*power_down)(struct drm_device *dev);
+       void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc);
 
        void (*lvds_bl_power)(struct drm_device *dev, bool on);
 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE