dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device

The MediaTek audio hardware block that exposes functionalities that are
handled by separate subsystems in the kernel.  These functions are all
mapped somewhere at 0x112xxxxx, and there are some control bits are mixed
up with other functions within the same registers.

This patch modifies example to illustrate child nodes.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
index 9b8f578d5e197847c949c5d1afd86fde54d871a2..97b304eaa47ce2c6c04b4688d959c980c6cbc302 100644 (file)
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
@@ -13,10 +13,19 @@ The AUDSYS controller uses the common clk binding from
 Documentation/devicetree/bindings/clock/clock-bindings.txt
 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
 
+Required sub-nodes:
+-------
+For common binding part and usage, refer to
+../sonud/mt2701-afe-pcm.txt.
+
 Example:
 
-audsys: audsys@11220000 {
-       compatible = "mediatek,mt7622-audsys", "syscon";
-       reg = <0 0x11220000 0 0x1000>;
-       #clock-cells = <1>;
-};
+       audsys: clock-controller@11220000 {
+               compatible = "mediatek,mt7622-audsys", "syscon";
+               reg = <0 0x11220000 0 0x2000>;
+               #clock-cells = <1>;
+
+               afe: audio-controller {
+                       ...
+               };
+       };