wifi: ath12k: hal: add ab parameter to macros using it
authorKalle Valo <quic_kvalo@quicinc.com>
Tue, 17 Jan 2023 12:03:17 +0000 (14:03 +0200)
committerKalle Valo <quic_kvalo@quicinc.com>
Wed, 18 Jan 2023 06:36:42 +0000 (08:36 +0200)
It's considered evil if a macro is using a variable but not having the variable
as a parameter. So add the ab parameter to macros using that.

No functional changes.

Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4

Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20221220120655.19389-2-kvalo@kernel.org
drivers/net/wireless/ath/ath12k/hal.c
drivers/net/wireless/ath/ath12k/hal.h

index 1e05e876af51abdc9e4aa38db101de89ff508f87..7b4a75ce5c82f6072df9f254e7490cef0f2e1018 100644 (file)
@@ -1217,17 +1217,17 @@ static void ath12k_hal_srng_dst_hw_init(struct ath12k_base *ab,
 
        if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) {
                ath12k_hif_write32(ab, reg_base +
-                                  HAL_REO1_RING_MSI1_BASE_LSB_OFFSET,
+                                  HAL_REO1_RING_MSI1_BASE_LSB_OFFSET(ab),
                                   srng->msi_addr);
 
                val = u32_encode_bits(((u64)srng->msi_addr >> HAL_ADDR_MSB_REG_SHIFT),
                                      HAL_REO1_RING_MSI1_BASE_MSB_ADDR) |
                                      HAL_REO1_RING_MSI1_BASE_MSB_MSI1_ENABLE;
                ath12k_hif_write32(ab, reg_base +
-                                      HAL_REO1_RING_MSI1_BASE_MSB_OFFSET, val);
+                                  HAL_REO1_RING_MSI1_BASE_MSB_OFFSET(ab), val);
 
                ath12k_hif_write32(ab,
-                                  reg_base + HAL_REO1_RING_MSI1_DATA_OFFSET,
+                                  reg_base + HAL_REO1_RING_MSI1_DATA_OFFSET(ab),
                                   srng->msi_data);
        }
 
@@ -1237,7 +1237,7 @@ static void ath12k_hal_srng_dst_hw_init(struct ath12k_base *ab,
                              HAL_REO1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
              u32_encode_bits((srng->entry_size * srng->num_entries),
                              HAL_REO1_RING_BASE_MSB_RING_SIZE);
-       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_BASE_MSB_OFFSET, val);
+       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_BASE_MSB_OFFSET(ab), val);
 
        val = u32_encode_bits(srng->ring_id, HAL_REO1_RING_ID_RING_ID) |
              u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
@@ -1251,15 +1251,15 @@ static void ath12k_hal_srng_dst_hw_init(struct ath12k_base *ab,
                                HAL_REO1_RING_PRDR_INT_SETUP_BATCH_COUNTER_THOLD);
 
        ath12k_hif_write32(ab,
-                          reg_base + HAL_REO1_RING_PRODUCER_INT_SETUP_OFFSET,
+                          reg_base + HAL_REO1_RING_PRODUCER_INT_SETUP_OFFSET(ab),
                           val);
 
        hp_addr = hal->rdp.paddr +
                  ((unsigned long)srng->u.dst_ring.hp_addr -
                   (unsigned long)hal->rdp.vaddr);
-       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_HP_ADDR_LSB_OFFSET,
+       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_HP_ADDR_LSB_OFFSET(ab),
                           hp_addr & HAL_ADDR_LSB_REG_MASK);
-       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_HP_ADDR_MSB_OFFSET,
+       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_HP_ADDR_MSB_OFFSET(ab),
                           hp_addr >> HAL_ADDR_MSB_REG_SHIFT);
 
        /* Initialize head and tail pointers to indicate ring is empty */
@@ -1278,7 +1278,7 @@ static void ath12k_hal_srng_dst_hw_init(struct ath12k_base *ab,
                val |= HAL_REO1_RING_MISC_MSI_SWAP;
        val |= HAL_REO1_RING_MISC_SRNG_ENABLE;
 
-       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_MISC_OFFSET, val);
+       ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_MISC_OFFSET(ab), val);
 }
 
 static void ath12k_hal_srng_src_hw_init(struct ath12k_base *ab,
index 4962fa81d1c11e0099f39c04bd37b630effac0a9..9d0f1d68c5343b9f85a488f7747f344ab355c771 100644 (file)
@@ -155,13 +155,13 @@ struct ath12k_base;
 #define HAL_REO1_AGING_THRESH_IX_2(ab) ((ab)->hw_params->regs->hal_reo1_aging_thres_ix2)
 #define HAL_REO1_AGING_THRESH_IX_3(ab) ((ab)->hw_params->regs->hal_reo1_aging_thres_ix3)
 
-#define HAL_REO1_RING_MSI1_BASE_LSB_OFFSET \
+#define HAL_REO1_RING_MSI1_BASE_LSB_OFFSET(ab)                         \
                (HAL_REO1_RING_MSI1_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_MSI1_BASE_MSB_OFFSET \
+#define HAL_REO1_RING_MSI1_BASE_MSB_OFFSET(ab)                         \
                (HAL_REO1_RING_MSI1_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_MSI1_DATA_OFFSET \
+#define HAL_REO1_RING_MSI1_DATA_OFFSET(ab)                             \
                (HAL_REO1_RING_MSI1_DATA(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_BASE_MSB_OFFSET \
+#define HAL_REO1_RING_BASE_MSB_OFFSET(ab)                              \
                (HAL_REO1_RING_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
 
 #define HAL_REO1_RING_ID_OFFSET(ab)                                    \
@@ -170,13 +170,13 @@ struct ath12k_base;
                (HAL_REO1_RING_ID(_ab) - HAL_REO1_RING_BASE_LSB(_ab));  \
        })
 
-#define HAL_REO1_RING_PRODUCER_INT_SETUP_OFFSET \
+#define HAL_REO1_RING_PRODUCER_INT_SETUP_OFFSET(ab)                    \
                (HAL_REO1_RING_PRODUCER_INT_SETUP(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_HP_ADDR_LSB_OFFSET \
+#define HAL_REO1_RING_HP_ADDR_LSB_OFFSET(ab)                           \
                (HAL_REO1_RING_HP_ADDR_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_HP_ADDR_MSB_OFFSET \
+#define HAL_REO1_RING_HP_ADDR_MSB_OFFSET(ab)                           \
                (HAL_REO1_RING_HP_ADDR_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
-#define HAL_REO1_RING_MISC_OFFSET \
+#define HAL_REO1_RING_MISC_OFFSET(ab)                                  \
                (HAL_REO1_RING_MISC(ab) - HAL_REO1_RING_BASE_LSB(ab))
 
 /* REO2SW(x) R2 ring pointers (head/tail) address */