platform/x86: intel_pmc_core: Change Jasper Lake S0ix debug reg map back to ICL
authorArchana Patni <archana.patni@intel.com>
Tue, 21 Apr 2020 08:40:19 +0000 (14:10 +0530)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 5 May 2020 12:32:41 +0000 (15:32 +0300)
commite87fa339d413c540c065c280ba9e7cc9a8dbcfd1
tree3a850b872b418be3416c81d0dbc35011a5dd3889
parentf585c9d5436a2dbedcd6c581bcabd41d7e372e21
platform/x86: intel_pmc_core: Change Jasper Lake S0ix debug reg map back to ICL

Jasper Lake uses Icelake PCH IPs and the S0ix debug interfaces are same as
Icelake. It uses SLP_S0_DBG register latch/read interface from Icelake
generation. It doesn't use Tiger Lake LPM debug registers. Change the
Jasper Lake S0ix debug interface to use the ICL reg map.

Fixes: 16292bed9c56 ("platform/x86: intel_pmc_core: Add Atom based Jasper Lake (JSL) platform support")
Signed-off-by: Archana Patni <archana.patni@intel.com>
Acked-by: David E. Box <david.e.box@intel.com>
Tested-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_pmc_core.c